Subzero. X86. Refactors initRegisterSet.

src/IceTargetLoweringX8632Traits.h

 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 253 matching lines @@
     // SSE2 is the PNaCl baseline instruction set.
     SSE2 = Begin,
     SSE4_1,
     End
   };
 
   static const char *TargetName;
   static constexpr Type WordType = IceType_i32;
 
   static IceString getRegName(int32_t RegNum) {
-    static const char *const RegNames[] = {
+    static const char *const RegNames[] = {{/* Empty for Reg_Invalid */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   name,
-        REGX8632_TABLE
+                                           REGX8632_TABLE
 #undef X
     };
     assert(RegNum >= 0);
     assert(RegNum < RegisterSet::Reg_NUM);
     return RegNames[RegNum];
   }
 
   static GPRRegister getEncodedGPR(int32_t RegNum) {
-    static const GPRRegister GPRRegs[] = {
+    static const GPRRegister GPRRegs[] = {{/* Empty for Reg_Invalid */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   GPRRegister(isGPR ? encode : GPRRegister::Encoded_Not_GPR),
-        REGX8632_TABLE
+                                          REGX8632_TABLE
 #undef X
     };
     assert(RegNum >= 0);
     assert(RegNum < RegisterSet::Reg_NUM);
     assert(GPRRegs[RegNum] != GPRRegister::Encoded_Not_GPR);
     return GPRRegs[RegNum];
   }
 
   static ByteRegister getEncodedByteReg(int32_t RegNum) {
-    static const ByteRegister ByteRegs[] = {
+    static const ByteRegister ByteRegs[] = {{/* Empty for Reg_Invalid */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   ByteRegister(is8 ? encode : ByteRegister::Encoded_Not_ByteReg),
-        REGX8632_TABLE
+                                            REGX8632_TABLE
 #undef X
     };
     assert(RegNum >= 0);
     assert(RegNum < RegisterSet::Reg_NUM);
     assert(ByteRegs[RegNum] != ByteRegister::Encoded_Not_ByteReg);
     return ByteRegs[RegNum];
   }
 
   static XmmRegister getEncodedXmm(int32_t RegNum) {
-    static const XmmRegister XmmRegs[] = {
+    static const XmmRegister XmmRegs[] = {{/* Empty for Reg_Invalid */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   XmmRegister(isXmm ? encode : XmmRegister::Encoded_Not_Xmm),
-        REGX8632_TABLE
+                                          REGX8632_TABLE
 #undef X
     };
     assert(RegNum >= 0);
     assert(RegNum < RegisterSet::Reg_NUM);
     assert(XmmRegs[RegNum] != XmmRegister::Encoded_Not_Xmm);
     return XmmRegs[RegNum];
   }
 
   static uint32_t getEncoding(int32_t RegNum) {
-    static const uint32_t Encoding[] = {
+    static const uint32_t Encoding[] = {{/* Empty for Reg_Invalid */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   encode,
-        REGX8632_TABLE
+                                        REGX8632_TABLE
 #undef X
     };
     assert(RegNum >= 0);
     assert(RegNum < RegisterSet::Reg_NUM);
     return Encoding[RegNum];
   }
 
   static int32_t getBaseReg(int32_t RegNum) {
-    static const int32_t BaseRegs[] = {
+    static const int32_t BaseRegs[] = {{/* Empty for Reg_Invalid */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
   RegisterSet::base,
-        REGX8632_TABLE
+                                       REGX8632_TABLE
 #undef X
     };
     assert(RegNum >= 0);
     assert(RegNum < RegisterSet::Reg_NUM);
     return BaseRegs[RegNum];
   }
 
   // Return a register in RegNum's alias set that is suitable for Ty.
   static int32_t getGprForType(Type Ty, int32_t RegNum) {
     assert(RegNum != Variable::NoRegister);
@@ skipping 46 matching lines @@
     llvm::SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
     llvm::SmallBitVector FloatRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector VectorRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc64To8Registers(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc32To8Registers(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc16To8Registers(RegisterSet::Reg_NUM);
     llvm::SmallBitVector Trunc8RcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector AhRcvrRegisters(RegisterSet::Reg_NUM);
     llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM);
     ScratchRegs->resize(RegisterSet::Reg_NUM);
+
+    static struct {
+      uint16_t Val;
+      int Is64 : 1;
+      int Is32 : 1;
+      int Is16 : 1;
+      int Is8 : 1;
+      int IsXmm : 1;
+      int Is64To8 : 1;
+      int Is32To8 : 1;
+      int Is16To8 : 1;
+      int IsTrunc8Rcvr : 1;
+      int IsAhRcvr : 1;
+      int Scratch : 1;
+      uint16_t Aliases[4];
+    } X8632RegTable[RegisterSet::Reg_NUM] = {
+        {/* Empty entry for RegInvalid. */},
 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr,     \
           isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8,      \
           isTrunc8Rcvr, isAhRcvr, aliases)                                     \
-  (IntegerRegistersI32)[RegisterSet::val] = is32;                              \
-  (IntegerRegistersI16)[RegisterSet::val] = is16;                              \
-  (IntegerRegistersI8)[RegisterSet::val] = is8;                                \
-  (FloatRegisters)[RegisterSet::val] = isXmm;                                  \
-  (VectorRegisters)[RegisterSet::val] = isXmm;                                 \
-  (Trunc64To8Registers)[RegisterSet::val] = is64To8;                           \
-  (Trunc32To8Registers)[RegisterSet::val] = is32To8;                           \
-  (Trunc16To8Registers)[RegisterSet::val] = is16To8;                           \
-  (Trunc8RcvrRegisters)[RegisterSet::val] = isTrunc8Rcvr;                      \
-  (AhRcvrRegisters)[RegisterSet::val] = isAhRcvr;                              \
-  (*RegisterAliases)[RegisterSet::val].resize(RegisterSet::Reg_NUM);           \
-  for (SizeT RegAlias : aliases) {                                             \
-    assert(!(*RegisterAliases)[RegisterSet::val][RegAlias] &&                  \
-           "Duplicate alias for " #val);                                       \
-    (*RegisterAliases)[RegisterSet::val].set(RegAlias);                        \
+  {                                                                            \
+    RegisterSet::val, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
+        isTrunc8Rcvr, isAhRcvr, scratch, aliases                               \
   }                                                                            \
-  (*RegisterAliases)[RegisterSet::val].set(RegisterSet::val);                  \
-  (*ScratchRegs)[RegisterSet::val] = scratch;
-    REGX8632_TABLE;
+  ,
+        REGX8632_TABLE
 #undef X
+    };
+
+    for (SizeT ii = 1; ii < llvm::array_lengthof(X8632RegTable); ++ii) {
+      const auto &Entry = X8632RegTable[ii];
+      (IntegerRegistersI32)[Entry.Val] = Entry.Is32;
+      (IntegerRegistersI16)[Entry.Val] = Entry.Is16;
+      (IntegerRegistersI8)[Entry.Val] = Entry.Is8;
+      (FloatRegisters)[Entry.Val] = Entry.IsXmm;
+      (VectorRegisters)[Entry.Val] = Entry.IsXmm;
+      (Trunc64To8Registers)[Entry.Val] = Entry.Is64To8;
+      (Trunc32To8Registers)[Entry.Val] = Entry.Is32To8;
+      (Trunc16To8Registers)[Entry.Val] = Entry.Is16To8;
+      (Trunc8RcvrRegisters)[Entry.Val] = Entry.IsTrunc8Rcvr;
+      (AhRcvrRegisters)[Entry.Val] = Entry.IsAhRcvr;
+      (*RegisterAliases)[Entry.Val].resize(RegisterSet::Reg_NUM);
+      for (SizeT Alias : Entry.Aliases) {
+        if (Alias == 0) {
+          break;
+        }
+        assert(!(*RegisterAliases)[Entry.Val][Alias] && "Duplicate alias");
+        (*RegisterAliases)[Entry.Val].set(Alias);
+      }
+      (*RegisterAliases)[Entry.Val].set(Entry.Val);
+      (*ScratchRegs)[Entry.Val] = Entry.Scratch;
+    }
 
     (*TypeToRegisterSet)[RC_void] = InvalidRegisters;
     (*TypeToRegisterSet)[RC_i1] = IntegerRegistersI8;
     (*TypeToRegisterSet)[RC_i8] = IntegerRegistersI8;
     (*TypeToRegisterSet)[RC_i16] = IntegerRegistersI16;
     (*TypeToRegisterSet)[RC_i32] = IntegerRegistersI32;
     (*TypeToRegisterSet)[RC_i64] = IntegerRegistersI32;
     (*TypeToRegisterSet)[RC_f32] = FloatRegisters;
     (*TypeToRegisterSet)[RC_f64] = FloatRegisters;
     (*TypeToRegisterSet)[RC_v4i1] = VectorRegisters;
@@ skipping 99 matching lines @@
     for (auto I : EquivalenceClasses) {
       const RegisterList &List = I.second;
       RegisterList Shuffled(List);
       RandomShuffle(Shuffled.begin(), Shuffled.end(), RNGW);
       for (size_t SI = 0, SE = Shuffled.size(); SI < SE; ++SI) {
         Permutation[List[SI]] = Shuffled[SI];
         ++NumShuffled;
       }
     }
 
-    assert(NumShuffled + NumPreserved == RegisterSet::Reg_NUM);
+    // We need to subtract one to account for Reg_Invalid.

[Jim Stichnoth, 2015/12/30 02:50:24]

Any chance this would be unnecessary, and everything else would work out, if you
set Reg_Invalid=-1?

[John, 2015/12/30 17:55:36]

Yes, and no. I don't know anyway of telling the linker to initializer

SizeT Aliases[4] = {xmm0};

as

SizeT Aliases[4] = {xmm0, -1, -1, -1};

And given that the alias list comes from a macro expansion within a macro, and
that said macro is used by other targets (e.g., ARM32) I decided against
changing the macro.

I could have changed the IceInstX86??.def files so that all register alias list
would have a terminator -- yuck.

I could also upgrade our toolchain to build sz using c++14, which defines
std::initializer_list<>'s ctor as constexpr (Too much work for 12/30).

My approach was to define a helper class

class SizeOf {
  template <...> SizeOf(...) {}
  SizeOf()
};

that computes the size of the initializer list. I abuse the uniform initializer
syntax (i.e., invoking ctors using {args}) to avoid even moar macro trickery for
removing the { and } from the alias list.

in the end, this solution is not as bad as it could've been. and given that this
is a temporary stopgap until c++14, I am not too sad about defining this new
helper class.

+    assert(NumShuffled + NumPreserved == RegisterSet::Reg_NUM - 1);
 
     if (Func->isVerbose(IceV_Random)) {
       OstreamLocker L(Func->getContext());
       Ostream &Str = Func->getContext()->getStrDump();
       Str << "Register equivalence classes:\n";
       for (auto I : EquivalenceClasses) {
         Str << "{";
         const RegisterList &List = I.second;
         bool First = true;
         for (int32_t Register : List) {
@@ skipping 305 matching lines @@
 
 } // end of namespace X86Internal
 
 namespace X8632 {
 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8632>;
 } // end of namespace X8632
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H