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| 1 //===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===// | 1 //===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| 11 /// \brief Declares the registers and their encodings for x86-32. | 11 /// \brief Declares the registers and their encodings for x86-32. |
| 12 /// | 12 /// |
| 13 //===----------------------------------------------------------------------===// | 13 //===----------------------------------------------------------------------===// |
| 14 | 14 |
| 15 #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H | 15 #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H |
| 16 #define SUBZERO_SRC_ICEREGISTERSX8632_H | 16 #define SUBZERO_SRC_ICEREGISTERSX8632_H |
| 17 | 17 |
| 18 #include "IceDefs.h" | 18 #include "IceDefs.h" |
| 19 #include "IceInstX8632.def" | 19 #include "IceInstX8632.def" |
| 20 #include "IceTypes.h" | 20 #include "IceTypes.h" |
| 21 | 21 |
| 22 namespace Ice { | 22 namespace Ice { |
| 23 | 23 |
| 24 class RegX8632 { | 24 class RegX8632 { |
| 25 public: | 25 public: |
| 26 /// An enum of every register. The enum value may not match the encoding used | 26 /// An enum of every register. The enum value may not match the encoding used |
| 27 /// to binary encode register operands in instructions. | 27 /// to binary encode register operands in instructions. |
| 28 enum AllRegisters { | 28 enum AllRegisters { |
| 29 Reg_Invalid, |
| 29 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ | 30 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \ |
| 30 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ | 31 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \ |
| 31 isTrunc8Rcvr, isAhRcvr, aliases) \ | 32 isTrunc8Rcvr, isAhRcvr, aliases) \ |
| 32 val, | 33 val, |
| 33 REGX8632_TABLE | 34 REGX8632_TABLE |
| 34 #undef X | 35 #undef X |
| 35 Reg_NUM | 36 Reg_NUM |
| 36 }; | 37 }; |
| 37 | 38 |
| 38 /// An enum of GPR Registers. The enum value does match the encoding used to | 39 /// An enum of GPR Registers. The enum value does match the encoding used to |
| (...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 83 static inline X87STRegister getEncodedSTReg(int32_t RegNum) { | 84 static inline X87STRegister getEncodedSTReg(int32_t RegNum) { |
| 84 assert(Encoded_X87ST_First <= RegNum); | 85 assert(Encoded_X87ST_First <= RegNum); |
| 85 assert(RegNum <= Encoded_X87ST_Last); | 86 assert(RegNum <= Encoded_X87ST_Last); |
| 86 return X87STRegister(RegNum); | 87 return X87STRegister(RegNum); |
| 87 } | 88 } |
| 88 }; | 89 }; |
| 89 | 90 |
| 90 } // end of namespace Ice | 91 } // end of namespace Ice |
| 91 | 92 |
| 92 #endif // SUBZERO_SRC_ICEREGISTERSX8632_H | 93 #endif // SUBZERO_SRC_ICEREGISTERSX8632_H |
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