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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
8 // on regular desktop machines. | 8 // on regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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372 inline int64_t rt() const { return get_register(rt_reg()); } | 372 inline int64_t rt() const { return get_register(rt_reg()); } |
373 inline uint64_t rt_u() const { | 373 inline uint64_t rt_u() const { |
374 return static_cast<uint64_t>(get_register(rt_reg())); | 374 return static_cast<uint64_t>(get_register(rt_reg())); |
375 } | 375 } |
376 inline int32_t rd_reg() const { return currentInstr_->RdValue(); } | 376 inline int32_t rd_reg() const { return currentInstr_->RdValue(); } |
377 inline int32_t fr_reg() const { return currentInstr_->FrValue(); } | 377 inline int32_t fr_reg() const { return currentInstr_->FrValue(); } |
378 inline int32_t fs_reg() const { return currentInstr_->FsValue(); } | 378 inline int32_t fs_reg() const { return currentInstr_->FsValue(); } |
379 inline int32_t ft_reg() const { return currentInstr_->FtValue(); } | 379 inline int32_t ft_reg() const { return currentInstr_->FtValue(); } |
380 inline int32_t fd_reg() const { return currentInstr_->FdValue(); } | 380 inline int32_t fd_reg() const { return currentInstr_->FdValue(); } |
381 inline int32_t sa() const { return currentInstr_->SaValue(); } | 381 inline int32_t sa() const { return currentInstr_->SaValue(); } |
| 382 inline int32_t lsa_sa() const { return currentInstr_->LsaSaValue(); } |
382 | 383 |
383 inline void SetResult(const int32_t rd_reg, const int64_t alu_out) { | 384 inline void SetResult(const int32_t rd_reg, const int64_t alu_out) { |
384 set_register(rd_reg, alu_out); | 385 set_register(rd_reg, alu_out); |
385 TraceRegWr(alu_out); | 386 TraceRegWr(alu_out); |
386 } | 387 } |
387 | 388 |
388 void DecodeTypeImmediate(Instruction* instr); | 389 void DecodeTypeImmediate(Instruction* instr); |
389 void DecodeTypeJump(Instruction* instr); | 390 void DecodeTypeJump(Instruction* instr); |
390 | 391 |
391 // Used for breakpoints and traps. | 392 // Used for breakpoints and traps. |
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537 static inline void UnregisterCTryCatch(Isolate* isolate) { | 538 static inline void UnregisterCTryCatch(Isolate* isolate) { |
538 Simulator::current(isolate)->PopAddress(); | 539 Simulator::current(isolate)->PopAddress(); |
539 } | 540 } |
540 }; | 541 }; |
541 | 542 |
542 } // namespace internal | 543 } // namespace internal |
543 } // namespace v8 | 544 } // namespace v8 |
544 | 545 |
545 #endif // !defined(USE_SIMULATOR) | 546 #endif // !defined(USE_SIMULATOR) |
546 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 547 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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