Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(6)

Side by Side Diff: src/base/bits.h

Issue 1544743004: [turbofan] Add Int64(Add|Sub)WithOverflow support. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Add truncation to the int64-sub-with-overflow-branch test Created 4 years, 12 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | src/compiler/arm64/code-generator-arm64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_BASE_BITS_H_ 5 #ifndef V8_BASE_BITS_H_
6 #define V8_BASE_BITS_H_ 6 #define V8_BASE_BITS_H_
7 7
8 #include <stdint.h> 8 #include <stdint.h>
9 #include "src/base/macros.h" 9 #include "src/base/macros.h"
10 #if V8_CC_MSVC 10 #if V8_CC_MSVC
(...skipping 194 matching lines...) Expand 10 before | Expand all | Expand 10 after
205 #if V8_HAS_BUILTIN_SSUB_OVERFLOW 205 #if V8_HAS_BUILTIN_SSUB_OVERFLOW
206 return __builtin_ssub_overflow(lhs, rhs, val); 206 return __builtin_ssub_overflow(lhs, rhs, val);
207 #else 207 #else
208 uint32_t res = static_cast<uint32_t>(lhs) - static_cast<uint32_t>(rhs); 208 uint32_t res = static_cast<uint32_t>(lhs) - static_cast<uint32_t>(rhs);
209 *val = bit_cast<int32_t>(res); 209 *val = bit_cast<int32_t>(res);
210 return ((res ^ lhs) & (res ^ ~rhs) & (1U << 31)) != 0; 210 return ((res ^ lhs) & (res ^ ~rhs) & (1U << 31)) != 0;
211 #endif 211 #endif
212 } 212 }
213 213
214 214
215 // SignedAddOverflow64(lhs,rhs,val) performs a signed summation of |lhs| and
216 // |rhs| and stores the result into the variable pointed to by |val| and
217 // returns true if the signed summation resulted in an overflow.
218 inline bool SignedAddOverflow64(int64_t lhs, int64_t rhs, int64_t* val) {
219 uint64_t res = static_cast<uint64_t>(lhs) + static_cast<uint64_t>(rhs);
220 *val = bit_cast<int64_t>(res);
221 return ((res ^ lhs) & (res ^ rhs) & (1ULL << 63)) != 0;
222 }
223
224
225 // SignedSubOverflow64(lhs,rhs,val) performs a signed subtraction of |lhs| and
226 // |rhs| and stores the result into the variable pointed to by |val| and
227 // returns true if the signed subtraction resulted in an overflow.
228 inline bool SignedSubOverflow64(int64_t lhs, int64_t rhs, int64_t* val) {
229 uint64_t res = static_cast<uint64_t>(lhs) - static_cast<uint64_t>(rhs);
230 *val = bit_cast<int64_t>(res);
231 return ((res ^ lhs) & (res ^ ~rhs) & (1ULL << 63)) != 0;
232 }
233
234
215 // SignedMulHigh32(lhs, rhs) multiplies two signed 32-bit values |lhs| and 235 // SignedMulHigh32(lhs, rhs) multiplies two signed 32-bit values |lhs| and
216 // |rhs|, extracts the most significant 32 bits of the result, and returns 236 // |rhs|, extracts the most significant 32 bits of the result, and returns
217 // those. 237 // those.
218 int32_t SignedMulHigh32(int32_t lhs, int32_t rhs); 238 int32_t SignedMulHigh32(int32_t lhs, int32_t rhs);
219 239
220 240
221 // SignedMulHighAndAdd32(lhs, rhs, acc) multiplies two signed 32-bit values 241 // SignedMulHighAndAdd32(lhs, rhs, acc) multiplies two signed 32-bit values
222 // |lhs| and |rhs|, extracts the most significant 32 bits of the result, and 242 // |lhs| and |rhs|, extracts the most significant 32 bits of the result, and
223 // adds the accumulate value |acc|. 243 // adds the accumulate value |acc|.
224 int32_t SignedMulHighAndAdd32(int32_t lhs, int32_t rhs, int32_t acc); 244 int32_t SignedMulHighAndAdd32(int32_t lhs, int32_t rhs, int32_t acc);
(...skipping 35 matching lines...) Expand 10 before | Expand all | Expand 10 after
260 // truncated to uint32. If |rhs| is zero, then zero is returned. 280 // truncated to uint32. If |rhs| is zero, then zero is returned.
261 inline uint32_t UnsignedMod32(uint32_t lhs, uint32_t rhs) { 281 inline uint32_t UnsignedMod32(uint32_t lhs, uint32_t rhs) {
262 return rhs ? lhs % rhs : 0u; 282 return rhs ? lhs % rhs : 0u;
263 } 283 }
264 284
265 } // namespace bits 285 } // namespace bits
266 } // namespace base 286 } // namespace base
267 } // namespace v8 287 } // namespace v8
268 288
269 #endif // V8_BASE_BITS_H_ 289 #endif // V8_BASE_BITS_H_
OLDNEW
« no previous file with comments | « no previous file | src/compiler/arm64/code-generator-arm64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698