Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(59)

Side by Side Diff: src/compiler/register-allocator.cc

Issue 1544603002: Turbofan: Rename register allocator double phase. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase. Created 4 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/register-allocator.h ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/linkage.h" 6 #include "src/compiler/linkage.h"
7 #include "src/compiler/register-allocator.h" 7 #include "src/compiler/register-allocator.h"
8 #include "src/string-stream.h" 8 #include "src/string-stream.h"
9 9
10 namespace v8 { 10 namespace v8 {
11 namespace internal { 11 namespace internal {
12 namespace compiler { 12 namespace compiler {
13 13
14 #define TRACE(...) \ 14 #define TRACE(...) \
15 do { \ 15 do { \
16 if (FLAG_trace_alloc) PrintF(__VA_ARGS__); \ 16 if (FLAG_trace_alloc) PrintF(__VA_ARGS__); \
17 } while (false) 17 } while (false)
18 18
19 19
20 namespace { 20 namespace {
21 21
22 void RemoveElement(ZoneVector<LiveRange*>* v, LiveRange* range) { 22 void RemoveElement(ZoneVector<LiveRange*>* v, LiveRange* range) {
23 auto it = std::find(v->begin(), v->end(), range); 23 auto it = std::find(v->begin(), v->end(), range);
24 DCHECK(it != v->end()); 24 DCHECK(it != v->end());
25 v->erase(it); 25 v->erase(it);
26 } 26 }
27 27
28 int GetRegisterCount(const RegisterConfiguration* cfg, RegisterKind kind) { 28 int GetRegisterCount(const RegisterConfiguration* cfg, RegisterKind kind) {
29 return kind == DOUBLE_REGISTERS ? cfg->num_double_registers() 29 return kind == FP_REGISTERS ? cfg->num_double_registers()
30 : cfg->num_general_registers(); 30 : cfg->num_general_registers();
31 } 31 }
32 32
33 33
34 int GetAllocatableRegisterCount(const RegisterConfiguration* cfg, 34 int GetAllocatableRegisterCount(const RegisterConfiguration* cfg,
35 RegisterKind kind) { 35 RegisterKind kind) {
36 return kind == DOUBLE_REGISTERS 36 return kind == FP_REGISTERS ? cfg->num_allocatable_aliased_double_registers()
37 ? cfg->num_allocatable_aliased_double_registers() 37 : cfg->num_allocatable_general_registers();
38 : cfg->num_allocatable_general_registers();
39 } 38 }
40 39
41 40
42 const int* GetAllocatableRegisterCodes(const RegisterConfiguration* cfg, 41 const int* GetAllocatableRegisterCodes(const RegisterConfiguration* cfg,
43 RegisterKind kind) { 42 RegisterKind kind) {
44 return kind == DOUBLE_REGISTERS ? cfg->allocatable_double_codes() 43 return kind == FP_REGISTERS ? cfg->allocatable_double_codes()
45 : cfg->allocatable_general_codes(); 44 : cfg->allocatable_general_codes();
46 } 45 }
47 46
48 47
49 const InstructionBlock* GetContainingLoop(const InstructionSequence* sequence, 48 const InstructionBlock* GetContainingLoop(const InstructionSequence* sequence,
50 const InstructionBlock* block) { 49 const InstructionBlock* block) {
51 RpoNumber index = block->loop_header(); 50 RpoNumber index = block->loop_header();
52 if (!index.IsValid()) return nullptr; 51 if (!index.IsValid()) return nullptr;
53 return sequence->InstructionBlockAt(index); 52 return sequence->InstructionBlockAt(index);
54 } 53 }
55 54
(...skipping 426 matching lines...) Expand 10 before | Expand all | Expand 10 after
482 481
483 void LiveRange::Spill() { 482 void LiveRange::Spill() {
484 DCHECK(!spilled()); 483 DCHECK(!spilled());
485 DCHECK(!TopLevel()->HasNoSpillType()); 484 DCHECK(!TopLevel()->HasNoSpillType());
486 set_spilled(true); 485 set_spilled(true);
487 bits_ = AssignedRegisterField::update(bits_, kUnassignedRegister); 486 bits_ = AssignedRegisterField::update(bits_, kUnassignedRegister);
488 } 487 }
489 488
490 489
491 RegisterKind LiveRange::kind() const { 490 RegisterKind LiveRange::kind() const {
492 return IsFloatingPoint(representation()) ? DOUBLE_REGISTERS 491 return IsFloatingPoint(representation()) ? FP_REGISTERS : GENERAL_REGISTERS;
493 : GENERAL_REGISTERS;
494 } 492 }
495 493
496 494
497 UsePosition* LiveRange::FirstHintPosition(int* register_index) const { 495 UsePosition* LiveRange::FirstHintPosition(int* register_index) const {
498 for (UsePosition* pos = first_pos_; pos != nullptr; pos = pos->next()) { 496 for (UsePosition* pos = first_pos_; pos != nullptr; pos = pos->next()) {
499 if (pos->HintRegister(register_index)) return pos; 497 if (pos->HintRegister(register_index)) return pos;
500 } 498 }
501 return nullptr; 499 return nullptr;
502 } 500 }
503 501
(...skipping 1072 matching lines...) Expand 10 before | Expand all | Expand 10 after
1576 TopLevelLiveRange* range) { 1574 TopLevelLiveRange* range) {
1577 DCHECK(!range->HasSpillOperand()); 1575 DCHECK(!range->HasSpillOperand());
1578 DCHECK(!range->IsSplinter()); 1576 DCHECK(!range->IsSplinter());
1579 SpillRange* spill_range = 1577 SpillRange* spill_range =
1580 new (allocation_zone()) SpillRange(range, allocation_zone()); 1578 new (allocation_zone()) SpillRange(range, allocation_zone());
1581 return spill_range; 1579 return spill_range;
1582 } 1580 }
1583 1581
1584 1582
1585 void RegisterAllocationData::MarkAllocated(RegisterKind kind, int index) { 1583 void RegisterAllocationData::MarkAllocated(RegisterKind kind, int index) {
1586 if (kind == DOUBLE_REGISTERS) { 1584 if (kind == FP_REGISTERS) {
1587 assigned_double_registers_->Add(index); 1585 assigned_double_registers_->Add(index);
1588 } else { 1586 } else {
1589 DCHECK(kind == GENERAL_REGISTERS); 1587 DCHECK(kind == GENERAL_REGISTERS);
1590 assigned_registers_->Add(index); 1588 assigned_registers_->Add(index);
1591 } 1589 }
1592 } 1590 }
1593 1591
1594 1592
1595 bool RegisterAllocationData::IsBlockBoundary(LifetimePosition pos) const { 1593 bool RegisterAllocationData::IsBlockBoundary(LifetimePosition pos) const {
1596 return pos.IsFullStart() && 1594 return pos.IsFullStart() &&
(...skipping 330 matching lines...) Expand 10 before | Expand all | Expand 10 after
1927 1925
1928 1926
1929 TopLevelLiveRange* LiveRangeBuilder::FixedDoubleLiveRangeFor(int index) { 1927 TopLevelLiveRange* LiveRangeBuilder::FixedDoubleLiveRangeFor(int index) {
1930 DCHECK(index < config()->num_double_registers()); 1928 DCHECK(index < config()->num_double_registers());
1931 TopLevelLiveRange* result = data()->fixed_double_live_ranges()[index]; 1929 TopLevelLiveRange* result = data()->fixed_double_live_ranges()[index];
1932 if (result == nullptr) { 1930 if (result == nullptr) {
1933 result = data()->NewLiveRange(FixedDoubleLiveRangeID(index), 1931 result = data()->NewLiveRange(FixedDoubleLiveRangeID(index),
1934 MachineRepresentation::kFloat64); 1932 MachineRepresentation::kFloat64);
1935 DCHECK(result->IsFixed()); 1933 DCHECK(result->IsFixed());
1936 result->set_assigned_register(index); 1934 result->set_assigned_register(index);
1937 data()->MarkAllocated(DOUBLE_REGISTERS, index); 1935 data()->MarkAllocated(FP_REGISTERS, index);
1938 data()->fixed_double_live_ranges()[index] = result; 1936 data()->fixed_double_live_ranges()[index] = result;
1939 } 1937 }
1940 return result; 1938 return result;
1941 } 1939 }
1942 1940
1943 1941
1944 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) { 1942 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) {
1945 if (operand->IsUnallocated()) { 1943 if (operand->IsUnallocated()) {
1946 return data()->GetOrCreateLiveRangeFor( 1944 return data()->GetOrCreateLiveRangeFor(
1947 UnallocatedOperand::cast(operand)->virtual_register()); 1945 UnallocatedOperand::cast(operand)->virtual_register());
(...skipping 627 matching lines...) Expand 10 before | Expand all | Expand 10 after
2575 2573
2576 if (first->HasNoSpillType()) { 2574 if (first->HasNoSpillType()) {
2577 data()->AssignSpillRangeToLiveRange(first); 2575 data()->AssignSpillRangeToLiveRange(first);
2578 } 2576 }
2579 range->Spill(); 2577 range->Spill();
2580 } 2578 }
2581 2579
2582 2580
2583 const ZoneVector<TopLevelLiveRange*>& RegisterAllocator::GetFixedRegisters() 2581 const ZoneVector<TopLevelLiveRange*>& RegisterAllocator::GetFixedRegisters()
2584 const { 2582 const {
2585 return mode() == DOUBLE_REGISTERS ? data()->fixed_double_live_ranges() 2583 return mode() == FP_REGISTERS ? data()->fixed_double_live_ranges()
2586 : data()->fixed_live_ranges(); 2584 : data()->fixed_live_ranges();
2587 } 2585 }
2588 2586
2589 2587
2590 const char* RegisterAllocator::RegisterName(int register_code) const { 2588 const char* RegisterAllocator::RegisterName(int register_code) const {
2591 if (mode() == GENERAL_REGISTERS) { 2589 if (mode() == GENERAL_REGISTERS) {
2592 return data()->config()->GetGeneralRegisterName(register_code); 2590 return data()->config()->GetGeneralRegisterName(register_code);
2593 } else { 2591 } else {
2594 return data()->config()->GetDoubleRegisterName(register_code); 2592 return data()->config()->GetDoubleRegisterName(register_code);
2595 } 2593 }
2596 } 2594 }
(...skipping 1062 matching lines...) Expand 10 before | Expand all | Expand 10 after
3659 } 3657 }
3660 } 3658 }
3661 } 3659 }
3662 } 3660 }
3663 } 3661 }
3664 3662
3665 3663
3666 } // namespace compiler 3664 } // namespace compiler
3667 } // namespace internal 3665 } // namespace internal
3668 } // namespace v8 3666 } // namespace v8
OLDNEW
« no previous file with comments | « src/compiler/register-allocator.h ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698