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Unified Diff: courgette/disassembler_elf_32_arm.cc

Issue 1543643002: Switch to standard integer types in courgette/. (Closed) Base URL: https://chromium.googlesource.com/chromium/src.git@master
Patch Set: fix Created 5 years ago
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Index: courgette/disassembler_elf_32_arm.cc
diff --git a/courgette/disassembler_elf_32_arm.cc b/courgette/disassembler_elf_32_arm.cc
index 800a64c7413d11ac8bbe09e6a9080f7669816378..f6490d9423c00c6cc6063e0f827c82f891763099 100644
--- a/courgette/disassembler_elf_32_arm.cc
+++ b/courgette/disassembler_elf_32_arm.cc
@@ -4,11 +4,13 @@
#include "courgette/disassembler_elf_32_arm.h"
+#include <stddef.h>
+#include <stdint.h>
+
#include <algorithm>
#include <string>
#include <vector>
-#include "base/basictypes.h"
#include "base/logging.h"
#include "courgette/assembly_program.h"
@@ -17,8 +19,11 @@
namespace courgette {
-CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type, uint32 arm_op, RVA rva,
- uint16* c_op, uint32* addr) {
+CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type,
+ uint32_t arm_op,
+ RVA rva,
+ uint16_t* c_op,
+ uint32_t* addr) {
// This method takes an ARM or thumb opcode, extracts the relative
// target address from it (addr), and creates a corresponding
// Courgette opcode (c_op).
@@ -31,32 +36,32 @@ CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type, uint32 arm_op, RVA rva,
case ARM_OFF8: {
// The offset is given by lower 8 bits of the op. It is a 9-bit
// offset, shifted right one bit and signed extended.
- uint32 temp = (arm_op & 0x00FF) << 1;
+ uint32_t temp = (arm_op & 0x00FF) << 1;
if (temp & 0x0100)
temp |= 0xFFFFFE00;
temp += 4; // Offset from _next_ PC.
fflush(stdout);
(*addr) = temp;
- (*c_op) = static_cast<uint16>(arm_op >> 8) | 0x1000;
+ (*c_op) = static_cast<uint16_t>(arm_op >> 8) | 0x1000;
break;
}
case ARM_OFF11: {
// The offset is given by lower 11 bits of the op, and is a
// 12-bit offset, shifted right one bit and sign extended.
- uint32 temp = (arm_op & 0x07FF) << 1;
+ uint32_t temp = (arm_op & 0x07FF) << 1;
if (temp & 0x00000800)
temp |= 0xFFFFF000;
temp += 4; // Offset from _next_ PC.
(*addr) = temp;
- (*c_op) = static_cast<uint16>(arm_op >> 11) | 0x2000;
+ (*c_op) = static_cast<uint16_t>(arm_op >> 11) | 0x2000;
break;
}
case ARM_OFF24: {
// The offset is given by the lower 24-bits of the op, shifted
// left 2 bits, and sign extended.
- uint32 temp = (arm_op & 0x00FFFFFF) << 2;
+ uint32_t temp = (arm_op & 0x00FFFFFF) << 2;
if (temp & 0x02000000)
temp |= 0xFC000000;
temp += 8;
@@ -66,28 +71,28 @@ CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type, uint32 arm_op, RVA rva,
break;
}
case ARM_OFF25: {
- uint32 temp = 0;
+ uint32_t temp = 0;
temp |= (arm_op & 0x000007FF) << 1; // imm11
temp |= (arm_op & 0x03FF0000) >> 4; // imm10
- uint32 S = (arm_op & (1 << 26)) >> 26;
- uint32 j2 = (arm_op & (1 << 11)) >> 11;
- uint32 j1 = (arm_op & (1 << 13)) >> 13;
+ uint32_t S = (arm_op & (1 << 26)) >> 26;
+ uint32_t j2 = (arm_op & (1 << 11)) >> 11;
+ uint32_t j1 = (arm_op & (1 << 13)) >> 13;
bool bit12 = ((arm_op & (1 << 12)) >> 12) != 0;
bool bit14 = ((arm_op & (1 << 14)) >> 14) != 0;
- uint32 i2 = ~(j2 ^ S) & 1;
- uint32 i1 = ~(j1 ^ S) & 1;
+ uint32_t i2 = ~(j2 ^ S) & 1;
+ uint32_t i1 = ~(j1 ^ S) & 1;
bool toARM = bit14 && !bit12;
temp |= (S << 24) | (i1 << 23) | (i2 << 22);
if (temp & 0x01000000) // sign extension
temp |= 0xFE000000;
- uint32 prefetch;
+ uint32_t prefetch;
if (toARM) {
// Align PC on 4-byte boundary
- uint32 align4byte = (rva % 4) ? 2 : 4;
+ uint32_t align4byte = (rva % 4) ? 2 : 4;
prefetch = align4byte;
} else {
prefetch = 4;
@@ -95,23 +100,23 @@ CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type, uint32 arm_op, RVA rva,
temp += prefetch;
(*addr) = temp;
- uint32 temp2 = 0x4000;
+ uint32_t temp2 = 0x4000;
temp2 |= (arm_op & (1 << 12)) >> 12;
temp2 |= (arm_op & (1 << 14)) >> 13;
temp2 |= (arm_op & (1 << 15)) >> 13;
temp2 |= (arm_op & 0xF8000000) >> 24;
temp2 |= (prefetch & 0x0000000F) << 8;
- (*c_op) = static_cast<uint16>(temp2);
+ (*c_op) = static_cast<uint16_t>(temp2);
break;
}
case ARM_OFF21: {
- uint32 temp = 0;
+ uint32_t temp = 0;
temp |= (arm_op & 0x000007FF) << 1; // imm11
temp |= (arm_op & 0x003F0000) >> 4; // imm6
- uint32 S = (arm_op & (1 << 26)) >> 26;
- uint32 j2 = (arm_op & (1 << 11)) >> 11;
- uint32 j1 = (arm_op & (1 << 13)) >> 13;
+ uint32_t S = (arm_op & (1 << 26)) >> 26;
+ uint32_t j2 = (arm_op & (1 << 11)) >> 11;
+ uint32_t j1 = (arm_op & (1 << 13)) >> 13;
temp |= (S << 20) | (j1 << 19) | (j2 << 18);
@@ -120,9 +125,9 @@ CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type, uint32 arm_op, RVA rva,
temp += 4;
(*addr) = temp;
- uint32 temp2 = 0x5000;
+ uint32_t temp2 = 0x5000;
temp2 |= (arm_op & 0x03C00000) >> 22; // just save the cond
- (*c_op) = static_cast<uint16>(temp2);
+ (*c_op) = static_cast<uint16_t>(temp2);
break;
}
default:
@@ -131,8 +136,10 @@ CheckBool DisassemblerElf32ARM::Compress(ARM_RVA type, uint32 arm_op, RVA rva,
return true;
}
-CheckBool DisassemblerElf32ARM::Decompress(ARM_RVA type, uint16 c_op,
- uint32 addr, uint32* arm_op) {
+CheckBool DisassemblerElf32ARM::Decompress(ARM_RVA type,
+ uint16_t c_op,
+ uint32_t addr,
+ uint32_t* arm_op) {
// Reverses the process in the compress() method. Takes the
// Courgette op and relative address and reconstructs the original
// ARM or thumb op.
@@ -147,23 +154,23 @@ CheckBool DisassemblerElf32ARM::Decompress(ARM_RVA type, uint16 c_op,
(*arm_op) = ((c_op & 0x0FFF) << 24) | (((addr - 8) >> 2) & 0x00FFFFFF);
break;
case ARM_OFF25: {
- uint32 temp = 0;
+ uint32_t temp = 0;
temp |= (c_op & (1 << 0)) << 12;
temp |= (c_op & (1 << 1)) << 13;
temp |= (c_op & (1 << 2)) << 13;
temp |= (c_op & (0xF8000000 >> 24)) << 24;
- uint32 prefetch = (c_op & 0x0F00) >> 8;
+ uint32_t prefetch = (c_op & 0x0F00) >> 8;
addr -= prefetch;
addr &= 0x01FFFFFF;
- uint32 S = (addr & (1 << 24)) >> 24;
- uint32 i1 = (addr & (1 << 23)) >> 23;
- uint32 i2 = (addr & (1 << 22)) >> 22;
+ uint32_t S = (addr & (1 << 24)) >> 24;
+ uint32_t i1 = (addr & (1 << 23)) >> 23;
+ uint32_t i2 = (addr & (1 << 22)) >> 22;
- uint32 j1 = ((~i1) ^ S) & 1;
- uint32 j2 = ((~i2) ^ S) & 1;
+ uint32_t j1 = ((~i1) ^ S) & 1;
+ uint32_t j2 = ((~i2) ^ S) & 1;
temp |= S << 26;
temp |= j2 << 11;
@@ -176,15 +183,15 @@ CheckBool DisassemblerElf32ARM::Decompress(ARM_RVA type, uint16 c_op,
break;
}
case ARM_OFF21: {
- uint32 temp = 0xF0008000;
+ uint32_t temp = 0xF0008000;
temp |= (c_op & (0x03C00000 >> 22)) << 22;
addr -= 4;
addr &= 0x001FFFFF;
- uint32 S = (addr & (1 << 20)) >> 20;
- uint32 j1 = (addr & (1 << 19)) >> 19;
- uint32 j2 = (addr & (1 << 18)) >> 18;
+ uint32_t S = (addr & (1 << 20)) >> 20;
+ uint32_t j1 = (addr & (1 << 19)) >> 19;
+ uint32_t j2 = (addr & (1 << 18)) >> 18;
temp |= S << 26;
temp |= j2 << 11;
@@ -202,7 +209,7 @@ CheckBool DisassemblerElf32ARM::Decompress(ARM_RVA type, uint16 c_op,
return true;
}
-uint16 DisassemblerElf32ARM::TypedRVAARM::op_size() const {
+uint16_t DisassemblerElf32ARM::TypedRVAARM::op_size() const {
switch (type_) {
case ARM_OFF8:
return 2;
@@ -220,7 +227,7 @@ uint16 DisassemblerElf32ARM::TypedRVAARM::op_size() const {
}
CheckBool DisassemblerElf32ARM::TypedRVAARM::ComputeRelativeTarget(
- const uint8* op_pointer) {
+ const uint8_t* op_pointer) {
arm_op_ = op_pointer;
switch (type_) {
case ARM_OFF8:
@@ -243,8 +250,8 @@ CheckBool DisassemblerElf32ARM::TypedRVAARM::ComputeRelativeTarget(
// Fall through
case ARM_OFF21: {
// A thumb-2 op is 32 bits stored as two 16-bit words
- uint32 pval = (Read16LittleEndian(op_pointer) << 16)
- | Read16LittleEndian(op_pointer + 2);
+ uint32_t pval = (Read16LittleEndian(op_pointer) << 16) |
+ Read16LittleEndian(op_pointer + 2);
RVA relative_target;
CheckBool ret = Compress(type_, pval, rva(), &c_op_, &relative_target);
set_relative_target(relative_target);
@@ -276,7 +283,7 @@ CheckBool DisassemblerElf32ARM::RelToRVA(Elf32_Rel rel, RVA* result) const {
(elf32_rel_arm_type_values)(unsigned char)rel.r_info;
// The other 3 bytes of r_info are the symbol
- uint32 symbol = rel.r_info >> 8;
+ uint32_t symbol = rel.r_info >> 8;
switch(type)
{
@@ -321,8 +328,8 @@ CheckBool DisassemblerElf32ARM::ParseRelocationSection(
Elf32_Rel *section_relocs_iter =
(Elf32_Rel *)OffsetToPointer(section_header->sh_offset);
- uint32 section_relocs_count = section_header->sh_size /
- section_header->sh_entsize;
+ uint32_t section_relocs_count =
+ section_header->sh_size / section_header->sh_entsize;
if (abs32_locations_.size() > section_relocs_count)
match = false;
@@ -330,7 +337,7 @@ CheckBool DisassemblerElf32ARM::ParseRelocationSection(
if (!abs32_locations_.empty()) {
std::vector<RVA>::iterator reloc_iter = abs32_locations_.begin();
- for (uint32 i = 0; i < section_relocs_count; i++) {
+ for (uint32_t i = 0; i < section_relocs_count; i++) {
if (section_relocs_iter->r_offset == *reloc_iter)
break;
@@ -364,20 +371,19 @@ CheckBool DisassemblerElf32ARM::ParseRelocationSection(
CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
const Elf32_Shdr* section_header) {
+ uint32_t start_file_offset = section_header->sh_offset;
+ uint32_t end_file_offset = start_file_offset + section_header->sh_size;
- uint32 start_file_offset = section_header->sh_offset;
- uint32 end_file_offset = start_file_offset + section_header->sh_size;
-
- const uint8* start_pointer = OffsetToPointer(start_file_offset);
- const uint8* end_pointer = OffsetToPointer(end_file_offset);
+ const uint8_t* start_pointer = OffsetToPointer(start_file_offset);
+ const uint8_t* end_pointer = OffsetToPointer(end_file_offset);
// Quick way to convert from Pointer to RVA within a single Section is to
// subtract 'pointer_to_rva'.
- const uint8* const adjust_pointer_to_rva = start_pointer -
- section_header->sh_addr;
+ const uint8_t* const adjust_pointer_to_rva =
+ start_pointer - section_header->sh_addr;
// Find the rel32 relocations.
- const uint8* p = start_pointer;
+ const uint8_t* p = start_pointer;
bool on_32bit = 1; // 32-bit ARM ops appear on 32-bit boundaries, so track it
while (p < end_pointer) {
// Heuristic discovery of rel32 locations in instruction stream: are the
@@ -390,12 +396,12 @@ CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
// 16-bit thumb ops
if (!found && (p + 3) <= end_pointer) {
- uint16 pval = Read16LittleEndian(p);
+ uint16_t pval = Read16LittleEndian(p);
if ((pval & 0xF000) == 0xD000) {
RVA rva = static_cast<RVA>(p - adjust_pointer_to_rva);
rel32_rva = new TypedRVAARM(ARM_OFF8, rva);
- if (!rel32_rva->ComputeRelativeTarget((uint8*) p)) {
+ if (!rel32_rva->ComputeRelativeTarget((uint8_t*)p)) {
return false;
}
target_rva = rel32_rva->rva() + rel32_rva->relative_target();
@@ -404,7 +410,7 @@ CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
RVA rva = static_cast<RVA>(p - adjust_pointer_to_rva);
rel32_rva = new TypedRVAARM(ARM_OFF11, rva);
- if (!rel32_rva->ComputeRelativeTarget((uint8*) p)) {
+ if (!rel32_rva->ComputeRelativeTarget((uint8_t*)p)) {
return false;
}
target_rva = rel32_rva->rva() + rel32_rva->relative_target();
@@ -415,7 +421,7 @@ CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
// thumb-2 ops comprised of two 16-bit words
if (!found && (p + 5) <= end_pointer) {
// This is really two 16-bit words, not one 32-bit word.
- uint32 pval = (Read16LittleEndian(p) << 16) | Read16LittleEndian(p + 2);
+ uint32_t pval = (Read16LittleEndian(p) << 16) | Read16LittleEndian(p + 2);
if ((pval & 0xF8008000) == 0xF0008000) {
// Covers thumb-2's 32-bit conditional/unconditional branches
@@ -424,7 +430,7 @@ CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
RVA rva = static_cast<RVA>(p - adjust_pointer_to_rva);
rel32_rva = new TypedRVAARM(ARM_OFF25, rva);
- if (!rel32_rva->ComputeRelativeTarget((uint8*) p)) {
+ if (!rel32_rva->ComputeRelativeTarget((uint8_t*)p)) {
return false;
}
target_rva = rel32_rva->rva() + rel32_rva->relative_target();
@@ -435,7 +441,7 @@ CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
RVA rva = static_cast<RVA>(p - adjust_pointer_to_rva);
rel32_rva = new TypedRVAARM(ARM_OFF21, rva);
- if (!rel32_rva->ComputeRelativeTarget((uint8*) p)) {
+ if (!rel32_rva->ComputeRelativeTarget((uint8_t*)p)) {
return false;
}
target_rva = rel32_rva->rva() + rel32_rva->relative_target();
@@ -446,13 +452,13 @@ CheckBool DisassemblerElf32ARM::ParseRel32RelocsFromSection(
// 32-bit ARM ops
if (!found && on_32bit && (p + 5) <= end_pointer) {
- uint32 pval = Read32LittleEndian(p);
+ uint32_t pval = Read32LittleEndian(p);
if ((pval & 0x0E000000) == 0x0A000000) {
// Covers both 0x0A 0x0B ARM relative branches
RVA rva = static_cast<RVA>(p - adjust_pointer_to_rva);
rel32_rva = new TypedRVAARM(ARM_OFF24, rva);
- if (!rel32_rva->ComputeRelativeTarget((uint8*) p)) {
+ if (!rel32_rva->ComputeRelativeTarget((uint8_t*)p)) {
return false;
}
target_rva = rel32_rva->rva() + rel32_rva->relative_target();
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