Chromium Code Reviews| Index: src/IceTargetLoweringX86BaseImpl.h |
| diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h |
| index b0618546c8964a699ab1e3dd07ae9350a5017622..ec0ba168f3883d65b9130637f037b91057752457 100644 |
| --- a/src/IceTargetLoweringX86BaseImpl.h |
| +++ b/src/IceTargetLoweringX86BaseImpl.h |
| @@ -994,7 +994,7 @@ void TargetX86Base<Machine>::lowerAlloca(const InstAlloca *Inst) { |
| if (UseFramePointer) |
| setHasFramePointer(); |
| - Variable *esp = getPhysicalRegister(getStackReg()); |
| + Variable *esp = getPhysicalRegister(getStackReg(), Traits::WordType); |
| if (OverAligned) { |
| _and(esp, Ctx->getConstantInt32(-Alignment)); |
| } |
| @@ -1019,8 +1019,12 @@ void TargetX86Base<Machine>::lowerAlloca(const InstAlloca *Inst) { |
| } else { |
| // Non-constant sizes need to be adjusted to the next highest multiple of |
| // the required alignment at runtime. |
| - Variable *T = makeReg(IceType_i32); |
| - _mov(T, TotalSize); |
| + Variable *T = makeReg(Traits::WordType); |
| + if (Traits::Is64Bit && TotalSize->getType() != IceType_i64) { |
| + _movzx(T, TotalSize); |
| + } else { |
| + _mov(T, TotalSize); |
| + } |
| _add(T, Ctx->getConstantInt32(Alignment - 1)); |
| _and(T, Ctx->getConstantInt32(-Alignment)); |
| _sub(esp, T); |
| @@ -1717,6 +1721,7 @@ void TargetX86Base<Machine>::lowerArithmetic(const InstArithmetic *Inst) { |
| case IceType_i64: |
| Eax = Traits::getRaxOrDie(); |
| Edx = Traits::getRdxOrDie(); |
| + break; |
| case IceType_i32: |
| Eax = Traits::RegisterSet::Reg_eax; |
| Edx = Traits::RegisterSet::Reg_edx; |
| @@ -3551,14 +3556,17 @@ void TargetX86Base<Machine>::lowerIntrinsicCall( |
| return; |
| } |
| case Intrinsics::Stacksave: { |
| - Variable *esp = Func->getTarget()->getPhysicalRegister(getStackReg()); |
| + Variable *esp = |
| + Func->getTarget()->getPhysicalRegister(getStackReg(), Traits::WordType); |
| Variable *Dest = Instr->getDest(); |
| _mov(Dest, esp); |
| return; |
| } |
| case Intrinsics::Stackrestore: { |
| - Variable *esp = Func->getTarget()->getPhysicalRegister(getStackReg()); |
| - _redefined(_mov(esp, Instr->getArg(0))); |
| + Operand *Src = Instr->getArg(0); |
| + Variable *esp = |
| + Func->getTarget()->getPhysicalRegister(getStackReg(), Src->getType()); |
| + _redefined(_mov(esp, Src)); |
| return; |
| } |
| case Intrinsics::Trap: |
| @@ -4263,6 +4271,11 @@ void TargetX86Base<Machine>::lowerMemset(Operand *Dest, Operand *Val, |
| template <class Machine> |
| void TargetX86Base<Machine>::lowerIndirectJump(Variable *Target) { |
|
Jim Stichnoth
2015/12/22 20:38:07
While you're at it, could you rename this argument
John
2015/12/23 18:30:43
Done.
|
| const bool NeedSandboxing = Ctx->getFlags().getUseSandboxing(); |
| + if (Traits::Is64Bit) { |
| + Variable *T = makeReg(IceType_i64); |
| + _movzx(T, Target); |
| + Target = T; |
| + } |
| if (NeedSandboxing) { |
| _bundle_lock(); |
| const SizeT BundleSize = |
| @@ -4671,7 +4684,7 @@ void TargetX86Base<Machine>::doMockBoundsCheck(Operand *Opnd) { |
| // We use lowerStore() to copy out-args onto the stack. This creates a memory |
| // operand with the stack pointer as the base register. Don't do bounds |
| // checks on that. |
| - if (Var->getRegNum() == Traits::RegisterSet::Reg_esp) |
| + if (Var->getRegNum() == static_cast<int32_t>(getStackReg())) |
| return; |
| auto *Label = Traits::Insts::Label::create(Func, this); |
| @@ -5981,8 +5994,10 @@ Operand *TargetX86Base<Machine>::legalize(Operand *From, LegalMask Allowed, |
| // register in x86-64. |
| if (Traits::Is64Bit) { |
| if (llvm::isa<ConstantInteger64>(Const)) { |
| - Variable *V = copyToReg(Const, RegNum); |
| - return V; |
| + if (RegNum != Variable::NoRegister) { |
| + assert(Traits::getGprForType(IceType_i64, RegNum) == RegNum); |
| + } |
| + return copyToReg(Const, RegNum); |
| } |
| } |