Subzero. X8664. Fixes filetype=asm.

src/IceInstX8664.cpp

 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 122 matching lines @@
     // TODO(sehr): ConstantRelocatable still needs updating for
     // rematerializable base/index and Disp.
     assert(Disp == 0);
     CR->emitWithoutPrefix(Func->getTarget());
   } else {
     llvm_unreachable("Invalid offset type for x86 mem operand");
   }
 
   if (Base || Index) {
     Str << "(";
-    if (Base)
-      Base->emit(Func);
+    if (Base) {
+      const Variable *Base32 = Base;
+      if (Base->getType() != IceType_i32) {
+        // X86-64 is ILP32, but %rsp and %rbp are accessed as 64-bit registers.
+        // For filetype=asm, they need to be emitted as their 32-bit sibilings.
+        assert(Base->getType() == IceType_i64);
+        assert(Base->getRegNum() == RegX8664::Encoded_Reg_rsp ||
+               Base->getRegNum() == RegX8664::Encoded_Reg_rbp);
+        Base32 = Base->asType(IceType_i32, X8664::Traits::getGprForType(
+                                               IceType_i32, Base->getRegNum()));
+      }
+      Base32->emit(Func);
+    }
     if (Index) {
+      assert(Index->getType() == IceType_i32);
       Str << ",";
       Index->emit(Func);
       if (Shift)
         Str << "," << (1u << Shift);
     }
     Str << ")";
   }
 }
 
 void MachineTraits<TargetX8664>::X86OperandMem::dump(const Cfg *Func,
@@ skipping 138 matching lines @@
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // namespace X86Internal
 } // end of namespace Ice
 
 X86INSTS_DEFINE_STATIC_DATA(TargetX8664)