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Unified Diff: src/mips64/simulator-mips64.cc

Issue 1542673002: Reland of "MIPS64: Fix trunc_l_[s,d] in simulator." (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix R6 test failures. Created 5 years ago
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Index: src/mips64/simulator-mips64.cc
diff --git a/src/mips64/simulator-mips64.cc b/src/mips64/simulator-mips64.cc
index d3fcb4a7a3e8798815aeacfe0412bf1a86b3c42c..42b9ee0ed301945433dcd52b5ed8c6b61041ad7b 100644
--- a/src/mips64/simulator-mips64.cc
+++ b/src/mips64/simulator-mips64.cc
@@ -1261,6 +1261,8 @@ bool Simulator::set_fcsr_round_error(double original, double rounded) {
// Returns true if the operation was invalid.
bool Simulator::set_fcsr_round64_error(double original, double rounded) {
bool ret = false;
+ // The value of INT64_MAX (2^63-1) can't be represented as double exactly,
+ // loading the most accurate representation into max_int64, which is 2^63.
double max_int64 = std::numeric_limits<int64_t>::max();
double min_int64 = std::numeric_limits<int64_t>::min();
@@ -1278,7 +1280,7 @@ bool Simulator::set_fcsr_round64_error(double original, double rounded) {
ret = true;
}
- if (rounded > max_int64 || rounded < min_int64) {
+ if (rounded >= max_int64 || rounded < min_int64) {
set_fcsr_bit(kFCSROverflowFlagBit, true);
// The reference is not really clear but it seems this is required:
set_fcsr_bit(kFCSRInvalidOpFlagBit, true);
@@ -1362,11 +1364,13 @@ void Simulator::set_fpu_register_invalid_result(float original, float rounded) {
void Simulator::set_fpu_register_invalid_result64(float original,
float rounded) {
if (FCSR_ & kFCSRNaN2008FlagMask) {
+ // The value of INT64_MAX (2^63-1) can't be represented as double exactly,
+ // loading the most accurate representation into max_int64, which is 2^63.
double max_int64 = std::numeric_limits<int64_t>::max();
double min_int64 = std::numeric_limits<int64_t>::min();
if (std::isnan(original)) {
set_fpu_register(fd_reg(), 0);
- } else if (rounded > max_int64) {
+ } else if (rounded >= max_int64) {
set_fpu_register(fd_reg(), kFPU64InvalidResult);
} else if (rounded < min_int64) {
set_fpu_register(fd_reg(), kFPU64InvalidResultNegative);
@@ -1422,11 +1426,13 @@ void Simulator::set_fpu_register_invalid_result(double original,
void Simulator::set_fpu_register_invalid_result64(double original,
double rounded) {
if (FCSR_ & kFCSRNaN2008FlagMask) {
+ // The value of INT64_MAX (2^63-1) can't be represented as double exactly,
+ // loading the most accurate representation into max_int64, which is 2^63.
double max_int64 = std::numeric_limits<int64_t>::max();
double min_int64 = std::numeric_limits<int64_t>::min();
if (std::isnan(original)) {
set_fpu_register(fd_reg(), 0);
- } else if (rounded > max_int64) {
+ } else if (rounded >= max_int64) {
set_fpu_register(fd_reg(), kFPU64InvalidResult);
} else if (rounded < min_int64) {
set_fpu_register(fd_reg(), kFPU64InvalidResultNegative);
@@ -1443,6 +1449,8 @@ void Simulator::set_fpu_register_invalid_result64(double original,
// Returns true if the operation was invalid.
bool Simulator::set_fcsr_round64_error(float original, float rounded) {
bool ret = false;
+ // The value of INT64_MAX (2^63-1) can't be represented as double exactly,
+ // loading the most accurate representation into max_int64, which is 2^63.
double max_int64 = std::numeric_limits<int64_t>::max();
double min_int64 = std::numeric_limits<int64_t>::min();
@@ -1460,7 +1468,7 @@ bool Simulator::set_fcsr_round64_error(float original, float rounded) {
ret = true;
}
- if (rounded > max_int64 || rounded < min_int64) {
+ if (rounded >= max_int64 || rounded < min_int64) {
set_fcsr_bit(kFCSROverflowFlagBit, true);
// The reference is not really clear but it seems this is required:
set_fcsr_bit(kFCSRInvalidOpFlagBit, true);
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