Add VADD instruction to the ARM integrated assembler.

src/DartARM32/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM)
@@ skipping 862 matching lines @@
 
 
 void Assembler::vstmd(BlockAddressMode am, Register base,
                       DRegister first, intptr_t count, Condition cond) {
   ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
   ASSERT(count <= 16);
   ASSERT(first + count <= kNumberOfDRegisters);
   EmitMultiVDMemOp(cond, am, false, base, first, count);
 }
 
-
+#if 0
+// Moved to ARM32::AssemblerARM32::emitVFPsss
 void Assembler::EmitVFPsss(Condition cond, int32_t opcode,
                            SRegister sd, SRegister sn, SRegister sm) {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT(sd != kNoSRegister);
   ASSERT(sn != kNoSRegister);
   ASSERT(sm != kNoSRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B27 | B26 | B25 | B11 | B9 | opcode |
                      ((static_cast<int32_t>(sd) & 1)*B22) |
                      ((static_cast<int32_t>(sn) >> 1)*B16) |
                      ((static_cast<int32_t>(sd) >> 1)*B12) |
                      ((static_cast<int32_t>(sn) & 1)*B7) |
                      ((static_cast<int32_t>(sm) & 1)*B5) |
                      (static_cast<int32_t>(sm) >> 1);
   Emit(encoding);
 }
 
-
+// Moved to ARM32::AssemblerARM32::emitVFPddd
 void Assembler::EmitVFPddd(Condition cond, int32_t opcode,
                            DRegister dd, DRegister dn, DRegister dm) {
   ASSERT(TargetCPUFeatures::vfp_supported());
   ASSERT(dd != kNoDRegister);
   ASSERT(dn != kNoDRegister);
   ASSERT(dm != kNoDRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B27 | B26 | B25 | B11 | B9 | B8 | opcode |
                      ((static_cast<int32_t>(dd) >> 4)*B22) |
                      ((static_cast<int32_t>(dn) & 0xf)*B16) |
                      ((static_cast<int32_t>(dd) & 0xf)*B12) |
                      ((static_cast<int32_t>(dn) >> 4)*B7) |
                      ((static_cast<int32_t>(dm) >> 4)*B5) |
                      (static_cast<int32_t>(dm) & 0xf);
   Emit(encoding);
 }
-
+#endif
 
 void Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) {
   EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm);
 }
 
 
 void Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) {
   EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm);
 }
 
@@ skipping 26 matching lines @@
        (((imm64 >> 54) & ((1 << 9) - 1)) == ((1 << 8) -1)))) {
     uint8_t imm8 = ((imm64 >> 63) << 7) | (((imm64 >> 61) & 1) << 6) |
         ((imm64 >> 48) & ((1 << 6) -1));
     EmitVFPddd(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | B8 | (imm8 & 0xf),
                dd, D0, D0);
     return true;
   }
   return false;
 }
 
-
+#if 0
+// Moved to Arm32::AssemblerARM32::vadds()
 void Assembler::vadds(SRegister sd, SRegister sn, SRegister sm,
                       Condition cond) {
   EmitVFPsss(cond, B21 | B20, sd, sn, sm);
 }
 
-
+// Moved to Arm32::AssemblerARM32::vaddd()
 void Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm,
                       Condition cond) {
   EmitVFPddd(cond, B21 | B20, dd, dn, dm);
 }
-
+#endif
 
 void Assembler::vsubs(SRegister sd, SRegister sn, SRegister sm,
                       Condition cond) {
   EmitVFPsss(cond, B21 | B20 | B6, sd, sn, sm);
 }
 
 
 void Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm,
                       Condition cond) {
   EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm);
@@ skipping 2694 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM