| OLD | NEW |
| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
| (...skipping 375 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 386 if (scale > kSmiShift) { | 386 if (scale > kSmiShift) { |
| 387 return Operand(smi, LSL, scale - kSmiShift); | 387 return Operand(smi, LSL, scale - kSmiShift); |
| 388 } else if (scale < kSmiShift) { | 388 } else if (scale < kSmiShift) { |
| 389 return Operand(smi, ASR, kSmiShift - scale); | 389 return Operand(smi, ASR, kSmiShift - scale); |
| 390 } | 390 } |
| 391 return Operand(smi); | 391 return Operand(smi); |
| 392 } | 392 } |
| 393 | 393 |
| 394 | 394 |
| 395 MemOperand::MemOperand(Register base, ptrdiff_t offset, AddrMode addrmode) | 395 MemOperand::MemOperand(Register base, ptrdiff_t offset, AddrMode addrmode) |
| 396 : base_(base), regoffset_(NoReg), offset_(offset), addrmode_(addrmode) { | 396 : base_(base), regoffset_(NoReg), offset_(offset), addrmode_(addrmode), |
| 397 shift_(NO_SHIFT), extend_(NO_EXTEND), shift_amount_(0) { |
| 397 ASSERT(base.Is64Bits() && !base.IsZero()); | 398 ASSERT(base.Is64Bits() && !base.IsZero()); |
| 398 } | 399 } |
| 399 | 400 |
| 400 | 401 |
| 401 MemOperand::MemOperand(Register base, | 402 MemOperand::MemOperand(Register base, |
| 402 Register regoffset, | 403 Register regoffset, |
| 403 Extend extend, | 404 Extend extend, |
| 404 unsigned shift_amount) | 405 unsigned shift_amount) |
| 405 : base_(base), regoffset_(regoffset), offset_(0), addrmode_(Offset), | 406 : base_(base), regoffset_(regoffset), offset_(0), addrmode_(Offset), |
| 406 shift_(NO_SHIFT), extend_(extend), shift_amount_(shift_amount) { | 407 shift_(NO_SHIFT), extend_(extend), shift_amount_(shift_amount) { |
| (...skipping 745 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1152 | 1153 |
| 1153 | 1154 |
| 1154 void Assembler::ClearRecordedAstId() { | 1155 void Assembler::ClearRecordedAstId() { |
| 1155 recorded_ast_id_ = TypeFeedbackId::None(); | 1156 recorded_ast_id_ = TypeFeedbackId::None(); |
| 1156 } | 1157 } |
| 1157 | 1158 |
| 1158 | 1159 |
| 1159 } } // namespace v8::internal | 1160 } } // namespace v8::internal |
| 1160 | 1161 |
| 1161 #endif // V8_A64_ASSEMBLER_A64_INL_H_ | 1162 #endif // V8_A64_ASSEMBLER_A64_INL_H_ |
| OLD | NEW |