Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(69)

Side by Side Diff: src/arm/full-codegen-arm.cc

Issue 153953005: A64: Synchronize with r16993. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/a64
Patch Set: Created 6 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/arm/builtins-arm.cc ('k') | src/arm/lithium-arm.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 4875 matching lines...) Expand 10 before | Expand all | Expand 10 after
4886 *context_length = 0; 4886 *context_length = 0;
4887 return previous_; 4887 return previous_;
4888 } 4888 }
4889 4889
4890 4890
4891 #undef __ 4891 #undef __
4892 4892
4893 4893
4894 static const int32_t kBranchBeforeInterrupt = 0x5a000004; 4894 static const int32_t kBranchBeforeInterrupt = 0x5a000004;
4895 4895
4896 // The back edge bookkeeping code matches the pattern:
4897 //
4898 // <decrement profiling counter>
4899 // 2a 00 00 01 bpl ok
4900 // e5 9f c? ?? ldr ip, [pc, <interrupt stub address>]
4901 // e1 2f ff 3c blx ip
4902 // ok-label
4903 //
4904 // We patch the code to the following form:
4905 //
4906 // <decrement profiling counter>
4907 // e1 a0 00 00 mov r0, r0 (NOP)
4908 // e5 9f c? ?? ldr ip, [pc, <on-stack replacement address>]
4909 // e1 2f ff 3c blx ip
4910 // ok-label
4911 4896
4912 void BackEdgeTable::PatchAt(Code* unoptimized_code, 4897 void BackEdgeTable::PatchAt(Code* unoptimized_code,
4913 Address pc_after, 4898 Address pc,
4899 BackEdgeState target_state,
4914 Code* replacement_code) { 4900 Code* replacement_code) {
4915 static const int kInstrSize = Assembler::kInstrSize; 4901 static const int kInstrSize = Assembler::kInstrSize;
4916 // Turn the jump into nops. 4902 Address branch_address = pc - 3 * kInstrSize;
4917 CodePatcher patcher(pc_after - 3 * kInstrSize, 1); 4903 CodePatcher patcher(branch_address, 1);
4918 patcher.masm()->nop(); 4904
4905 switch (target_state) {
4906 case INTERRUPT:
4907 // <decrement profiling counter>
4908 // 2a 00 00 01 bpl ok
4909 // e5 9f c? ?? ldr ip, [pc, <interrupt stub address>]
4910 // e1 2f ff 3c blx ip
4911 // ok-label
4912 patcher.masm()->b(4 * kInstrSize, pl); // Jump offset is 4 instructions.
4913 ASSERT_EQ(kBranchBeforeInterrupt, Memory::int32_at(branch_address));
4914 break;
4915 case ON_STACK_REPLACEMENT:
4916 case OSR_AFTER_STACK_CHECK:
4917 // <decrement profiling counter>
4918 // e1 a0 00 00 mov r0, r0 (NOP)
4919 // e5 9f c? ?? ldr ip, [pc, <on-stack replacement address>]
4920 // e1 2f ff 3c blx ip
4921 // ok-label
4922 patcher.masm()->nop();
4923 break;
4924 }
4925
4926 Address pc_immediate_load_address = pc - 2 * kInstrSize;
4919 // Replace the call address. 4927 // Replace the call address.
4920 uint32_t interrupt_address_offset = Memory::uint16_at(pc_after - 4928 uint32_t interrupt_address_offset =
4921 2 * kInstrSize) & 0xfff; 4929 Memory::uint16_at(pc_immediate_load_address) & 0xfff;
4922 Address interrupt_address_pointer = pc_after + interrupt_address_offset; 4930 Address interrupt_address_pointer = pc + interrupt_address_offset;
4923 Memory::uint32_at(interrupt_address_pointer) = 4931 Memory::uint32_at(interrupt_address_pointer) =
4924 reinterpret_cast<uint32_t>(replacement_code->entry()); 4932 reinterpret_cast<uint32_t>(replacement_code->entry());
4925 4933
4926 unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch( 4934 unoptimized_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch(
4927 unoptimized_code, pc_after - 2 * kInstrSize, replacement_code); 4935 unoptimized_code, pc_immediate_load_address, replacement_code);
4928 } 4936 }
4929 4937
4930 4938
4931 void BackEdgeTable::RevertAt(Code* unoptimized_code, 4939 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState(
4932 Address pc_after, 4940 Isolate* isolate,
4933 Code* interrupt_code) { 4941 Code* unoptimized_code,
4942 Address pc) {
4934 static const int kInstrSize = Assembler::kInstrSize; 4943 static const int kInstrSize = Assembler::kInstrSize;
4935 // Restore the original jump. 4944 ASSERT(Memory::int32_at(pc - kInstrSize) == kBlxIp);
4936 CodePatcher patcher(pc_after - 3 * kInstrSize, 1);
4937 patcher.masm()->b(4 * kInstrSize, pl); // ok-label is 4 instructions later.
4938 ASSERT_EQ(kBranchBeforeInterrupt,
4939 Memory::int32_at(pc_after - 3 * kInstrSize));
4940 // Restore the original call address.
4941 uint32_t interrupt_address_offset = Memory::uint16_at(pc_after -
4942 2 * kInstrSize) & 0xfff;
4943 Address interrupt_address_pointer = pc_after + interrupt_address_offset;
4944 Memory::uint32_at(interrupt_address_pointer) =
4945 reinterpret_cast<uint32_t>(interrupt_code->entry());
4946 4945
4947 interrupt_code->GetHeap()->incremental_marking()->RecordCodeTargetPatch( 4946 Address branch_address = pc - 3 * kInstrSize;
4948 unoptimized_code, pc_after - 2 * kInstrSize, interrupt_code); 4947 Address pc_immediate_load_address = pc - 2 * kInstrSize;
4948 uint32_t interrupt_address_offset =
4949 Memory::uint16_at(pc_immediate_load_address) & 0xfff;
4950 Address interrupt_address_pointer = pc + interrupt_address_offset;
4951
4952 if (Memory::int32_at(branch_address) == kBranchBeforeInterrupt) {
4953 ASSERT(Memory::uint32_at(interrupt_address_pointer) ==
4954 reinterpret_cast<uint32_t>(
4955 isolate->builtins()->InterruptCheck()->entry()));
4956 ASSERT(Assembler::IsLdrPcImmediateOffset(
4957 Assembler::instr_at(pc_immediate_load_address)));
4958 return INTERRUPT;
4959 }
4960
4961 ASSERT(Assembler::IsNop(Assembler::instr_at(branch_address)));
4962 ASSERT(Assembler::IsLdrPcImmediateOffset(
4963 Assembler::instr_at(pc_immediate_load_address)));
4964
4965 if (Memory::uint32_at(interrupt_address_pointer) ==
4966 reinterpret_cast<uint32_t>(
4967 isolate->builtins()->OnStackReplacement()->entry())) {
4968 return ON_STACK_REPLACEMENT;
4969 }
4970
4971 ASSERT(Memory::uint32_at(interrupt_address_pointer) ==
4972 reinterpret_cast<uint32_t>(
4973 isolate->builtins()->OsrAfterStackCheck()->entry()));
4974 return OSR_AFTER_STACK_CHECK;
4949 } 4975 }
4950 4976
4951 4977
4952 #ifdef DEBUG
4953 BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState(
4954 Isolate* isolate,
4955 Code* unoptimized_code,
4956 Address pc_after) {
4957 static const int kInstrSize = Assembler::kInstrSize;
4958 ASSERT(Memory::int32_at(pc_after - kInstrSize) == kBlxIp);
4959
4960 uint32_t interrupt_address_offset =
4961 Memory::uint16_at(pc_after - 2 * kInstrSize) & 0xfff;
4962 Address interrupt_address_pointer = pc_after + interrupt_address_offset;
4963
4964 if (Assembler::IsNop(Assembler::instr_at(pc_after - 3 * kInstrSize))) {
4965 ASSERT(Assembler::IsLdrPcImmediateOffset(
4966 Assembler::instr_at(pc_after - 2 * kInstrSize)));
4967 Code* osr_builtin =
4968 isolate->builtins()->builtin(Builtins::kOnStackReplacement);
4969 ASSERT(reinterpret_cast<uint32_t>(osr_builtin->entry()) ==
4970 Memory::uint32_at(interrupt_address_pointer));
4971 return ON_STACK_REPLACEMENT;
4972 } else {
4973 // Get the interrupt stub code object to match against from cache.
4974 Code* interrupt_builtin =
4975 isolate->builtins()->builtin(Builtins::kInterruptCheck);
4976 ASSERT(Assembler::IsLdrPcImmediateOffset(
4977 Assembler::instr_at(pc_after - 2 * kInstrSize)));
4978 ASSERT_EQ(kBranchBeforeInterrupt,
4979 Memory::int32_at(pc_after - 3 * kInstrSize));
4980 ASSERT(reinterpret_cast<uint32_t>(interrupt_builtin->entry()) ==
4981 Memory::uint32_at(interrupt_address_pointer));
4982 return INTERRUPT;
4983 }
4984 }
4985 #endif // DEBUG
4986
4987
4988 } } // namespace v8::internal 4978 } } // namespace v8::internal
4989 4979
4990 #endif // V8_TARGET_ARCH_ARM 4980 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « src/arm/builtins-arm.cc ('k') | src/arm/lithium-arm.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698