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Issue 153923005: A64: Synchronize with r17525. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/a64
Patch Set: Created 6 years, 10 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1350 if (!src.is_byte_register()) { 1350 if (!src.is_byte_register()) {
1351 emit_rex_32(src, dst); 1351 emit_rex_32(src, dst);
1352 } else { 1352 } else {
1353 emit_optional_rex_32(src, dst); 1353 emit_optional_rex_32(src, dst);
1354 } 1354 }
1355 emit(0x88); 1355 emit(0x88);
1356 emit_operand(src, dst); 1356 emit_operand(src, dst);
1357 } 1357 }
1358 1358
1359 1359
1360 void Assembler::movb(const Operand& dst, Immediate imm) {
1361 EnsureSpace ensure_space(this);
1362 emit_optional_rex_32(dst);
1363 emit(0xC6);
1364 emit_operand(0x0, dst);
1365 emit(static_cast<byte>(imm.value_));
1366 }
1367
1368
1360 void Assembler::movw(const Operand& dst, Register src) { 1369 void Assembler::movw(const Operand& dst, Register src) {
1361 EnsureSpace ensure_space(this); 1370 EnsureSpace ensure_space(this);
1362 emit(0x66); 1371 emit(0x66);
1363 emit_optional_rex_32(src, dst); 1372 emit_optional_rex_32(src, dst);
1364 emit(0x89); 1373 emit(0x89);
1365 emit_operand(src, dst); 1374 emit_operand(src, dst);
1366 } 1375 }
1367 1376
1368 1377
1378 void Assembler::movw(const Operand& dst, Immediate imm) {
1379 EnsureSpace ensure_space(this);
1380 emit(0x66);
1381 emit_optional_rex_32(dst);
1382 emit(0xC7);
1383 emit_operand(0x0, dst);
1384 emit(static_cast<byte>(imm.value_ & 0xff));
1385 emit(static_cast<byte>(imm.value_ >> 8));
1386 }
1387
1388
1369 void Assembler::movl(Register dst, const Operand& src) { 1389 void Assembler::movl(Register dst, const Operand& src) {
1370 EnsureSpace ensure_space(this); 1390 EnsureSpace ensure_space(this);
1371 emit_optional_rex_32(dst, src); 1391 emit_optional_rex_32(dst, src);
1372 emit(0x8B); 1392 emit(0x8B);
1373 emit_operand(dst, src); 1393 emit_operand(dst, src);
1374 } 1394 }
1375 1395
1376 1396
1377 void Assembler::movl(Register dst, Register src) { 1397 void Assembler::movl(Register dst, Register src) {
1378 EnsureSpace ensure_space(this); 1398 EnsureSpace ensure_space(this);
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2480 2500
2481 void Assembler::andps(XMMRegister dst, XMMRegister src) { 2501 void Assembler::andps(XMMRegister dst, XMMRegister src) {
2482 EnsureSpace ensure_space(this); 2502 EnsureSpace ensure_space(this);
2483 emit_optional_rex_32(dst, src); 2503 emit_optional_rex_32(dst, src);
2484 emit(0x0F); 2504 emit(0x0F);
2485 emit(0x54); 2505 emit(0x54);
2486 emit_sse_operand(dst, src); 2506 emit_sse_operand(dst, src);
2487 } 2507 }
2488 2508
2489 2509
2510 void Assembler::orps(XMMRegister dst, XMMRegister src) {
2511 EnsureSpace ensure_space(this);
2512 emit_optional_rex_32(dst, src);
2513 emit(0x0F);
2514 emit(0x56);
2515 emit_sse_operand(dst, src);
2516 }
2517
2518
2519 void Assembler::xorps(XMMRegister dst, XMMRegister src) {
2520 EnsureSpace ensure_space(this);
2521 emit_optional_rex_32(dst, src);
2522 emit(0x0F);
2523 emit(0x57);
2524 emit_sse_operand(dst, src);
2525 }
2526
2527
2490 // SSE 2 operations. 2528 // SSE 2 operations.
2491 2529
2492 void Assembler::movd(XMMRegister dst, Register src) { 2530 void Assembler::movd(XMMRegister dst, Register src) {
2493 EnsureSpace ensure_space(this); 2531 EnsureSpace ensure_space(this);
2494 emit(0x66); 2532 emit(0x66);
2495 emit_optional_rex_32(dst, src); 2533 emit_optional_rex_32(dst, src);
2496 emit(0x0F); 2534 emit(0x0F);
2497 emit(0x6E); 2535 emit(0x6E);
2498 emit_sse_operand(dst, src); 2536 emit_sse_operand(dst, src);
2499 } 2537 }
(...skipping 411 matching lines...) Expand 10 before | Expand all | Expand 10 after
2911 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 2949 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2912 EnsureSpace ensure_space(this); 2950 EnsureSpace ensure_space(this);
2913 emit(0x66); 2951 emit(0x66);
2914 emit_optional_rex_32(dst, src); 2952 emit_optional_rex_32(dst, src);
2915 emit(0x0F); 2953 emit(0x0F);
2916 emit(0x57); 2954 emit(0x57);
2917 emit_sse_operand(dst, src); 2955 emit_sse_operand(dst, src);
2918 } 2956 }
2919 2957
2920 2958
2921 void Assembler::xorps(XMMRegister dst, XMMRegister src) {
2922 EnsureSpace ensure_space(this);
2923 emit_optional_rex_32(dst, src);
2924 emit(0x0F);
2925 emit(0x57);
2926 emit_sse_operand(dst, src);
2927 }
2928
2929
2930 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2959 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
2931 EnsureSpace ensure_space(this); 2960 EnsureSpace ensure_space(this);
2932 emit(0xF2); 2961 emit(0xF2);
2933 emit_optional_rex_32(dst, src); 2962 emit_optional_rex_32(dst, src);
2934 emit(0x0F); 2963 emit(0x0F);
2935 emit(0x51); 2964 emit(0x51);
2936 emit_sse_operand(dst, src); 2965 emit_sse_operand(dst, src);
2937 } 2966 }
2938 2967
2939 2968
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3089 bool RelocInfo::IsCodedSpecially() { 3118 bool RelocInfo::IsCodedSpecially() {
3090 // The deserializer needs to know whether a pointer is specially coded. Being 3119 // The deserializer needs to know whether a pointer is specially coded. Being
3091 // specially coded on x64 means that it is a relative 32 bit address, as used 3120 // specially coded on x64 means that it is a relative 32 bit address, as used
3092 // by branch instructions. 3121 // by branch instructions.
3093 return (1 << rmode_) & kApplyMask; 3122 return (1 << rmode_) & kApplyMask;
3094 } 3123 }
3095 3124
3096 } } // namespace v8::internal 3125 } } // namespace v8::internal
3097 3126
3098 #endif // V8_TARGET_ARCH_X64 3127 #endif // V8_TARGET_ARCH_X64
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