Add mls instruction to the ARM integrated assembler.

src/DartARM32/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
@@ skipping 122 matching lines @@
   }
 
 #if 0
   // Moved to encodeRotatedImm8() in IceAssemblerARM32.cpp
   // Data-processing operands - Immediate.
   explicit Operand(uint32_t immediate) {
     ASSERT(immediate < (1 << kImmed8Bits));
     type_ = 1;
     encoding_ = immediate;
   }
-#endif
 
-#if 0
   // Moved to decodeOperand() and encodeRotatedImm8() in IceAssemblerARM32.cpp
   // Data-processing operands - Rotated immediate.
   Operand(uint32_t rotate, uint32_t immed8) {
     ASSERT((rotate < (1 << kRotateBits)) && (immed8 < (1 << kImmed8Bits)));
     type_ = 1;
     encoding_ = (rotate << kRotateShift) | (immed8 << kImmed8Shift);
   }
 
   // Moved to decodeOperand() in IceAssemblerARM32.cpp
   // Data-processing operands - Register.
@@ skipping 287 matching lines @@
   const Code::Comments& GetCodeComments() const;
 
   static const char* RegisterName(Register reg);
 
   static const char* FpuRegisterName(FpuRegister reg);
 
 #if 0
   // Moved to ARM32::AssemblerARM32::and_()
   // Data-processing instructions.
   void and_(Register rd, Register rn, Operand o, Condition cond = AL);
-#endif
 
-#if 0
   // Moved to ARM32::AssemblerARM32::eor()
   void eor(Register rd, Register rn, Operand o, Condition cond = AL);
 
   // Moved to ARM32::AssemberARM32::sub()
   void sub(Register rd, Register rn, Operand o, Condition cond = AL);
   void subs(Register rd, Register rn, Operand o, Condition cond = AL);
 
   // Moved to ARM32::AssemberARM32::rsb()
   void rsb(Register rd, Register rn, Operand o, Condition cond = AL);
   void rsbs(Register rd, Register rn, Operand o, Condition cond = AL);
@@ skipping 30 matching lines @@
   // Moved to ARM32::AssemblerARM32::cmn()
   void cmn(Register rn, Operand o, Condition cond = AL);
 
   // Moved to ARM32::IceAssemblerARM32::orr().
   void orr(Register rd, Register rn, Operand o, Condition cond = AL);
   void orrs(Register rd, Register rn, Operand o, Condition cond = AL);
 
   // Moved to ARM32::IceAssemblerARM32::mov()
   void mov(Register rd, Operand o, Condition cond = AL);
   void movs(Register rd, Operand o, Condition cond = AL);
-#endif
 
-#if 0
   // Moved to ARM32::IceAssemblerARM32::bic()
   void bic(Register rd, Register rn, Operand o, Condition cond = AL);
   void bics(Register rd, Register rn, Operand o, Condition cond = AL);
 
   // Moved to ARM32::IceAssemblerARM32::mvn()
   void mvn(Register rd, Operand o, Condition cond = AL);
   void mvns(Register rd, Operand o, Condition cond = AL);
 
   // Miscellaneous data-processing instructions.
   // Moved to ARM32::AssemblerARM32::clz()
   void clz(Register rd, Register rm, Condition cond = AL);
 
   // Multiply instructions.
 
   // Moved to ARM32::AssemblerARM32::mul()
   void mul(Register rd, Register rn, Register rm, Condition cond = AL);
   void muls(Register rd, Register rn, Register rm, Condition cond = AL);
 
   // Moved to ARM32::AssemblerARM32::mla()
   void mla(Register rd, Register rn, Register rm, Register ra,
            Condition cond = AL);
-#endif
+  // Moved to ARM32::AssemblerARM32::mls()
   void mls(Register rd, Register rn, Register rm, Register ra,
            Condition cond = AL);
+#endif
+
   void smull(Register rd_lo, Register rd_hi, Register rn, Register rm,
              Condition cond = AL);
+
 #if 0
   // Moved to ARM32::AssemblerARM32::umull();
   void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
              Condition cond = AL);
 #endif
   void smlal(Register rd_lo, Register rd_hi, Register rn, Register rm,
              Condition cond = AL);
   void umlal(Register rd_lo, Register rd_hi, Register rn, Register rm,
              Condition cond = AL);
 
@@ skipping 12 matching lines @@
   // Moved to ARM32::AssemblerARM32::ldr()
   // Load/store instructions.
   void ldr(Register rd, Address ad, Condition cond = AL);
   // Moved to ARM32::AssemblerARM32::str()
   void str(Register rd, Address ad, Condition cond = AL);
 
   // Moved to ARM32::AssemblerARM32::ldr()
   void ldrb(Register rd, Address ad, Condition cond = AL);
   // Moved to ARM32::AssemblerARM32::str()
   void strb(Register rd, Address ad, Condition cond = AL);
+
+  // Moved to ARM32::AssemblerARM32::ldr()
+  void ldrh(Register rd, Address ad, Condition cond = AL);
+  // Moved to ARM32::AssemblerARM32::str()
+  void strh(Register rd, Address ad, Condition cond = AL);
 #endif
 
-  void ldrh(Register rd, Address ad, Condition cond = AL);
-  void strh(Register rd, Address ad, Condition cond = AL);
-
   void ldrsb(Register rd, Address ad, Condition cond = AL);
   void ldrsh(Register rd, Address ad, Condition cond = AL);
 
   // ldrd and strd actually support the full range of addressing modes, but
   // we don't use them, and we need to split them up into two instructions for
   // ARMv5TE, so we only support the base + offset mode.
   void ldrd(Register rd, Register rn, int32_t offset, Condition cond = AL);
   void strd(Register rd, Register rn, int32_t offset, Condition cond = AL);
 
 #if 0
   // Folded into ARM32::AssemblerARM32::popList(), since it is its only use (and
   // doesn't implement ARM LDM instructions).
   void ldm(BlockAddressMode am, Register base,
            RegList regs, Condition cond = AL);
 
   // Folded into ARM32::AssemblerARM32::pushList(), since it is its only use
   // (and doesn't implement ARM STM instruction).
   void stm(BlockAddressMode am, Register base,
            RegList regs, Condition cond = AL);
 
   // Moved to ARM::AssemblerARM32::ldrex();
   void ldrex(Register rd, Register rn, Condition cond = AL);
   // Moved to ARM::AssemblerARM32::strex();
   void strex(Register rd, Register rt, Register rn, Condition cond = AL);
 #endif
 
   // Miscellaneous instructions.
   void clrex();
+
 #if 0
   // Moved to ARM32::AssemblerARM32::nop().
   void nop(Condition cond = AL);
 
   // Moved to ARM32::AssemblerARM32::bkpt()
   // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
   void bkpt(uint16_t imm16);
 
   static int32_t BkptEncoding(uint16_t imm16) {
     // bkpt requires that the cond field is AL.
@@ skipping 713 matching lines @@
   // ARM32::AssemblerARM::uxt() (uxtb and uxth).
 #endif
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_