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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1538443003: Add mls instruction to the ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Update DART sources. Created 5 years ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
(...skipping 224 matching lines...) Expand 10 before | Expand all | Expand 10 after
235 235
236 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 236 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
237 237
238 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 238 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
239 239
240 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 240 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
241 241
242 void mla(const Operand *OpRd, const Operand *OpRn, const Operand *OpRm, 242 void mla(const Operand *OpRd, const Operand *OpRn, const Operand *OpRm,
243 const Operand *OpRa, CondARM32::Cond Cond); 243 const Operand *OpRa, CondARM32::Cond Cond);
244 244
245 void mls(const Operand *OpRd, const Operand *OpRn, const Operand *OpRm,
246 const Operand *OpRa, CondARM32::Cond Cond);
247
245 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 248 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
246 bool SetFlags, CondARM32::Cond Cond); 249 bool SetFlags, CondARM32::Cond Cond);
247 250
248 void mvn(const Operand *OpRd, const Operand *OpScc, CondARM32::Cond Cond); 251 void mvn(const Operand *OpRd, const Operand *OpScc, CondARM32::Cond Cond);
249 252
250 void nop(); 253 void nop();
251 254
252 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 255 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
253 bool SetFlags, CondARM32::Cond Cond); 256 bool SetFlags, CondARM32::Cond Cond);
254 257
(...skipping 191 matching lines...) Expand 10 before | Expand all | Expand 10 after
446 // where cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and 449 // where cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and
447 // iiiiiiiiiiiiiiii=Imm16. 450 // iiiiiiiiiiiiiiii=Imm16.
448 void emitMovwt(CondARM32::Cond Cond, bool IsMovw, const Operand *OpRd, 451 void emitMovwt(CondARM32::Cond Cond, bool IsMovw, const Operand *OpRd,
449 const Operand *OpSrc, const char *MovName); 452 const Operand *OpSrc, const char *MovName);
450 }; 453 };
451 454
452 } // end of namespace ARM32 455 } // end of namespace ARM32
453 } // end of namespace Ice 456 } // end of namespace Ice
454 457
455 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 458 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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