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| 1 //===- subzero/unittest/AssemblerX8664/ControlFlow.cpp --------------------===// | 1 //===- subzero/unittest/AssemblerX8664/ControlFlow.cpp --------------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 #include "AssemblerX8664/TestUtil.h" | 9 #include "AssemblerX8664/TestUtil.h" |
| 10 | 10 |
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| 153 TestImpl(r15, r1); | 153 TestImpl(r15, r1); |
| 154 | 154 |
| 155 #undef TestImpl | 155 #undef TestImpl |
| 156 } | 156 } |
| 157 | 157 |
| 158 TEST_F(AssemblerX8664Test, CallAddr) { | 158 TEST_F(AssemblerX8664Test, CallAddr) { |
| 159 #define TestImpl(Dst, Src) \ | 159 #define TestImpl(Dst, Src) \ |
| 160 do { \ | 160 do { \ |
| 161 const uint32_t T0 = allocateQword(); \ | 161 const uint32_t T0 = allocateQword(); \ |
| 162 const uint64_t V0 = 0xA0C0FFEEBEEFFEEFull; \ | 162 const uint64_t V0 = 0xA0C0FFEEBEEFFEEFull; \ |
| 163 const uint32_t T1 = allocateDword(); \ |
| 163 __ call(Immediate(16)); \ | 164 __ call(Immediate(16)); \ |
| 164 int CallTargetAddr = codeBytesSize() + 12; \ | 165 int CallTargetAddr = codeBytesSize() + 12; \ |
| 165 __ mov(IceType_i8, Encoded_GPR_##Dst##l(), Immediate(0xf4)); \ | 166 __ mov(IceType_i8, Encoded_GPR_##Dst##l(), Immediate(0xf4)); \ |
| 166 __ ret(); \ | 167 __ ret(); \ |
| 167 for (int I = codeBytesSize(); I < CallTargetAddr; ++I) { \ | 168 for (int I = codeBytesSize(); I < CallTargetAddr; ++I) { \ |
| 168 __ hlt(); \ | 169 __ hlt(); \ |
| 169 } \ | 170 } \ |
| 170 __ mov(IceType_i64, Encoded_GPR_##Dst##q(), dwordAddress(T0)); \ | 171 __ mov(IceType_i64, Encoded_GPR_##Dst##q(), dwordAddress(T0)); \ |
| 171 __ mov(IceType_i64, Encoded_GPR_##Src##q(), Encoded_GPR_rsp()); \ | |
| 172 __ call(Address(Encoded_GPR_##Src##q(), 0, AssemblerFixup::NoFixup)); \ | |
| 173 __ popl(Encoded_GPR_##Src##q()); \ | 172 __ popl(Encoded_GPR_##Src##q()); \ |
| 173 __ mov(IceType_i32, dwordAddress(T1), Encoded_GPR_##Src##d()); \ |
| 174 __ call(dwordAddress(T1)); \ |
| 174 \ | 175 \ |
| 175 AssembledTest test = assemble(); \ | 176 AssembledTest test = assemble(); \ |
| 176 test.setQwordTo(T0, V0); \ | 177 test.setQwordTo(T0, V0); \ |
| 177 test.run(); \ | 178 test.run(); \ |
| 178 \ | 179 \ |
| 179 ASSERT_EQ(0xA0C0FFEEBEEFFEF4ull, test.Dst##q()) << "(" #Dst ", " #Src ")"; \ | 180 ASSERT_EQ(0xA0C0FFEEBEEFFEF4ull, test.Dst##q()) << "(" #Dst ", " #Src ")"; \ |
| 180 reset(); \ | 181 reset(); \ |
| 181 } while (0) | 182 } while (0) |
| 182 | 183 |
| 183 TestImpl(r1, r2); | 184 TestImpl(r1, r2); |
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| 298 TestImplReg(r15); | 299 TestImplReg(r15); |
| 299 | 300 |
| 300 #undef TestImplReg | 301 #undef TestImplReg |
| 301 #undef TestImplAddr | 302 #undef TestImplAddr |
| 302 } | 303 } |
| 303 | 304 |
| 304 } // end of anonymous namespace | 305 } // end of anonymous namespace |
| 305 } // end of namespace Test | 306 } // end of namespace Test |
| 306 } // end of namespace X8664 | 307 } // end of namespace X8664 |
| 307 } // end of namespace Ice | 308 } // end of namespace Ice |
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