Subzero. x8664. Resurrects the Target.

src/IceInstX86Base.h

 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 944 matching lines @@
   using Base = InstX86BaseMovlike<Machine, K>;
 
   bool isRedundantAssign() const override {
     if (const auto *SrcVar = llvm::dyn_cast<const Variable>(this->getSrc(0))) {
       if (SrcVar->hasReg() && this->Dest->hasReg()) {
         // An assignment between physical registers is considered redundant if
         // they have the same base register and the same encoding. E.g.:
         //   mov cl, ecx ==> redundant
         //   mov ch, ecx ==> not redundant due to different encodings
         //   mov ch, ebp ==> not redundant due to different base registers
-        // TODO(stichnot): Don't consider "mov eax, eax" to be redundant when
-        // used in 64-bit mode to clear the upper half of rax.
-        int32_t SrcReg = SrcVar->getRegNum();
-        int32_t DestReg = this->Dest->getRegNum();
+        //   mov ecx, ecx ==> redundant, and dangerous in x86-64. i64 zexting
+        //                    is handled by Inst86Zext.
+        const int32_t SrcReg = SrcVar->getRegNum();
+        const int32_t DestReg = this->Dest->getRegNum();
         return (InstX86Base<Machine>::Traits::getEncoding(SrcReg) ==
                 InstX86Base<Machine>::Traits::getEncoding(DestReg)) &&
                (InstX86Base<Machine>::Traits::getBaseReg(SrcReg) ==
                 InstX86Base<Machine>::Traits::getBaseReg(DestReg));
       }
     }
     return checkForRedundantAssign(this->getDest(), this->getSrc(0));
   }
   bool isVarAssign() const override {
     return llvm::isa<Variable>(this->getSrc(0));
@@ skipping 183 matching lines @@
       : InstX86BaseUnaryopXmm<Machine, InstX86Base<Machine>::Sqrtss>(Func, Dest,
                                                                      Src) {}
 };
 
 /// Move/assignment instruction - wrapper for mov/movss/movsd.
 template <class Machine>
 class InstX86Mov
     : public InstX86BaseMovlike<Machine, InstX86Base<Machine>::Mov> {
 public:
   static InstX86Mov *create(Cfg *Func, Variable *Dest, Operand *Source) {
+    assert(!isScalarIntegerType(Dest->getType()) ||
+           (typeWidthInBytes(Dest->getType()) <=
+            typeWidthInBytes(Source->getType())));
     return new (Func->allocate<InstX86Mov>()) InstX86Mov(Func, Dest, Source);
   }
 
   void emit(const Cfg *Func) const override;
   void emitIAS(const Cfg *Func) const override;
 
 private:
   InstX86Mov(Cfg *Func, Variable *Dest, Operand *Source)
       : InstX86BaseMovlike<Machine, InstX86Base<Machine>::Mov>(Func, Dest,
                                                                Source) {}
@@ skipping 2183 matching lines @@
           &InstX86Base<Machine>::Traits::Assembler::psrl};                     \
   }                                                                            \
   }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #include "IceInstX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICEINSTX86BASE_H