Subzero. x8664. Resurrects the Target.

src/IceAssemblerX86BaseImpl.h

 //===- subzero/src/IceAssemblerX86BaseImpl.h - base x86 assembler -*- C++ -*-=//
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
 //                        The Subzero Code Generator
@@ skipping 94 matching lines @@
 void AssemblerX86Base<Machine>::call(typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitRexB(RexTypeIrrelevant, reg);
   emitUint8(0xFF);
   emitRegisterOperand(2, gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::call(const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
   emitUint8(0xFF);
   emitOperand(2, address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::call(const ConstantRelocatable *label) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   intptr_t call_start = Buffer.getPosition();
   emitUint8(0xE8);
@@ skipping 26 matching lines @@
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   // Any type that would not force a REX prefix to be emitted can be provided
   // here.
   emitRexB(RexTypeIrrelevant, reg);
   emitUint8(0x58 + gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::popl(const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
   emitUint8(0x8F);
   emitOperand(0, address);
 }
 
 template <class Machine>
 template <typename, typename>
 void AssemblerX86Base<Machine>::pushal() {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x60);
@@ skipping 13 matching lines @@
   emitRexB(IceType_i8, dst);
   emitUint8(0x0F);
   emitUint8(0x90 + condition);
   emitUint8(0xC0 + gprEncoding(dst));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::setcc(typename Traits::Cond::BrCond condition,
                                       const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
   emitUint8(0x0F);
   emitUint8(0x90 + condition);
   emitOperand(0, address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mov(Type Ty, typename Traits::GPRRegister dst,
                                     const Immediate &imm) {
   assert(Ty != IceType_i64 && "i64 not supported yet.");
@@ skipping 26 matching lines @@
   }
   emitRegisterOperand(gprEncoding(src), gprEncoding(dst));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mov(Type Ty, typename Traits::GPRRegister dst,
                                     const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, src, dst);
   if (isByteSizedType(Ty)) {
     emitUint8(0x8A);
   } else {
     emitUint8(0x8B);
   }
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mov(Type Ty,
                                     const typename Traits::Address &dst,
                                     typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, dst, src);
   if (isByteSizedType(Ty)) {
     emitUint8(0x88);
   } else {
     emitUint8(0x89);
   }
   emitOperand(gprEncoding(src), dst);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mov(Type Ty,
                                     const typename Traits::Address &dst,
                                     const Immediate &imm) {
   assert(Ty != IceType_i64 && "i64 not supported yet.");
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, dst, RexRegIrrelevant);
   if (isByteSizedType(Ty)) {
     emitUint8(0xC6);
     emitOperand(0, dst);
     emitUint8(imm.value() & 0xFF);
   } else {
     emitUint8(0xC7);
     emitOperand(0, dst);
     emitImmediate(Ty, imm);
   }
@@ skipping 44 matching lines @@
   if (Traits::Is64Bit && SrcTy == IceType_i32) {
     // 32-bit mov clears the upper 32 bits, hence zero-extending the 32-bit
     // operand to 64-bit.
     mov(IceType_i32, dst, src);
     return;
   }
 
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   bool ByteSized = isByteSizedType(SrcTy);
   assert(ByteSized || SrcTy == IceType_i16);
+  emitAddrSizeOverridePrefix();
   emitRex(SrcTy, src, RexTypeIrrelevant, dst);
   emitUint8(0x0F);
   emitUint8(ByteSized ? 0xB6 : 0xB7);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movsx(Type SrcTy,
                                       typename Traits::GPRRegister dst,
                                       typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   bool ByteSized = isByteSizedType(SrcTy);
   emitRexRB(RexTypeForceRexW, dst, SrcTy, src);
   if (ByteSized || SrcTy == IceType_i16) {
     emitUint8(0x0F);
     emitUint8(ByteSized ? 0xBE : 0xBF);
   } else {
     assert(Traits::Is64Bit && SrcTy == IceType_i32);
     emitUint8(0x63);
   }
   emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movsx(Type SrcTy,
                                       typename Traits::GPRRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   bool ByteSized = isByteSizedType(SrcTy);
+  emitAddrSizeOverridePrefix();
   emitRex(SrcTy, src, RexTypeForceRexW, dst);
   if (ByteSized || SrcTy == IceType_i16) {
     emitUint8(0x0F);
     emitUint8(ByteSized ? 0xBE : 0xBF);
   } else {
     assert(Traits::Is64Bit && SrcTy == IceType_i32);
     emitUint8(0x63);
   }
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::lea(Type Ty, typename Traits::GPRRegister dst,
                                     const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(Ty == IceType_i16 || Ty == IceType_i32);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, src, dst);
   emitUint8(0x8D);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cmov(Type Ty,
                                      typename Traits::Cond::BrCond cond,
                                      typename Traits::GPRRegister dst,
                                      typename Traits::GPRRegister src) {
@@ skipping 11 matching lines @@
 template <class Machine>
 void AssemblerX86Base<Machine>::cmov(Type Ty,
                                      typename Traits::Cond::BrCond cond,
                                      typename Traits::GPRRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   else
     assert(Ty == IceType_i32 || (Traits::Is64Bit && Ty == IceType_i64));
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, src, dst);
   emitUint8(0x0F);
   emitUint8(0x40 + cond);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine> void AssemblerX86Base<Machine>::rep_movsb() {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xF3);
   emitUint8(0xA4);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x10);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movss(Type Ty,
                                       const typename Traits::Address &dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x11);
   emitOperand(gprEncoding(src), dst);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 15 matching lines @@
   emitUint8(0x6E);
   emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movd(Type SrcTy,
                                      typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(SrcTy, src, dst);
   emitUint8(0x0F);
   emitUint8(0x6E);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movd(Type DestTy,
                                      typename Traits::GPRRegister dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(DestTy, src, dst);
   emitUint8(0x0F);
   emitUint8(0x7E);
   emitRegisterOperand(gprEncoding(src), gprEncoding(dst));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movd(Type DestTy,
                                      const typename Traits::Address &dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(DestTy, dst, src);
   emitUint8(0x0F);
   emitUint8(0x7E);
   emitOperand(gprEncoding(src), dst);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movq(typename Traits::XmmRegister dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xF3);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x7E);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movq(const typename Traits::Address &dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0xD6);
   emitOperand(gprEncoding(src), dst);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movq(typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xF3);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x7E);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::addss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x58);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::addss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x58);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::subss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5C);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::subss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5C);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mulss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x59);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mulss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x59);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::divss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5E);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::divss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5E);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fld(Type Ty, const typename T::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
   emitOperand(0, src);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fstp(Type Ty, const typename T::Address &dst) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
   emitOperand(3, dst);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fstp(typename T::X87STRegister st) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xDD);
   emitUint8(0xD8 + st);
@@ skipping 16 matching lines @@
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x10);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movups(typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x10);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movups(const typename Traits::Address &dst,
                                        typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x11);
   emitOperand(gprEncoding(src), dst);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::padd(Type Ty, typename Traits::XmmRegister dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty)) {
     emitUint8(0xFC);
   } else if (Ty == IceType_i16) {
     emitUint8(0xFD);
   } else {
     emitUint8(0xFE);
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::padd(Type Ty, typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty)) {
     emitUint8(0xFC);
   } else if (Ty == IceType_i16) {
     emitUint8(0xFD);
   } else {
     emitUint8(0xFE);
   }
   emitOperand(gprEncoding(dst), src);
@@ skipping 10 matching lines @@
   emitUint8(0xDB);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pand(Type /* Ty */,
                                      typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xDB);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pandn(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0xDF);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pandn(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xDF);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pmull(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xD5);
   } else {
     assert(Ty == IceType_i32);
     emitUint8(0x38);
     emitUint8(0x40);
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pmull(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xD5);
   } else {
     assert(Ty == IceType_i32);
     emitUint8(0x38);
     emitUint8(0x40);
   }
   emitOperand(gprEncoding(dst), src);
@@ skipping 10 matching lines @@
   emitUint8(0xF4);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pmuludq(Type /* Ty */,
                                         typename Traits::XmmRegister dst,
                                         const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xF4);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::por(Type /* Ty */,
                                     typename Traits::XmmRegister dst,
                                     typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0xEB);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::por(Type /* Ty */,
                                     typename Traits::XmmRegister dst,
                                     const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xEB);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::psub(Type Ty, typename Traits::XmmRegister dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty)) {
     emitUint8(0xF8);
   } else if (Ty == IceType_i16) {
     emitUint8(0xF9);
   } else {
     emitUint8(0xFA);
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::psub(Type Ty, typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty)) {
     emitUint8(0xF8);
   } else if (Ty == IceType_i16) {
     emitUint8(0xF9);
   } else {
     emitUint8(0xFA);
   }
   emitOperand(gprEncoding(dst), src);
@@ skipping 10 matching lines @@
   emitUint8(0xEF);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pxor(Type /* Ty */,
                                      typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xEF);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::psll(Type Ty, typename Traits::XmmRegister dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xF1);
   } else {
     assert(Ty == IceType_i32);
     emitUint8(0xF2);
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::psll(Type Ty, typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xF1);
   } else {
     assert(Ty == IceType_i32);
     emitUint8(0xF2);
   }
   emitOperand(gprEncoding(dst), src);
 }
@@ skipping 30 matching lines @@
     emitUint8(0xE2);
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::psra(Type Ty, typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xE1);
   } else {
     assert(Ty == IceType_i32);
     emitUint8(0xE2);
   }
   emitOperand(gprEncoding(dst), src);
 }
@@ skipping 32 matching lines @@
     emitUint8(0xD2);
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::psrl(Type Ty, typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xD1);
   } else if (Ty == IceType_f64) {
     emitUint8(0xD3);
   } else {
     assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
     emitUint8(0xD2);
   }
@@ skipping 32 matching lines @@
   emitUint8(0x0F);
   emitUint8(0x58);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::addps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x58);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::subps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5C);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::subps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5C);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::divps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5E);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::divps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5E);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mulps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x59);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mulps(Type /* Ty */,
                                       typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x59);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::minps(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5D);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::minps(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5D);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::minss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5D);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::minss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5D);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::maxps(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5F);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::maxps(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5F);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::maxss(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5F);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::maxss(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5F);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::andnps(Type Ty,
                                        typename Traits::XmmRegister dst,
                                        typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x55);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::andnps(Type Ty,
                                        typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x55);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::andps(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x54);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::andps(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x54);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::orps(Type Ty, typename Traits::XmmRegister dst,
                                      typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x56);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::orps(Type Ty, typename Traits::XmmRegister dst,
                                      const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x56);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::blendvps(Type /* Ty */,
                                          typename Traits::XmmRegister dst,
                                          typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x38);
   emitUint8(0x14);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::blendvps(Type /* Ty */,
                                          typename Traits::XmmRegister dst,
                                          const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x38);
   emitUint8(0x14);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pblendvb(Type /* Ty */,
                                          typename Traits::XmmRegister dst,
                                          typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x38);
   emitUint8(0x10);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pblendvb(Type /* Ty */,
                                          typename Traits::XmmRegister dst,
                                          const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x38);
   emitUint8(0x10);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cmpps(
     Type Ty, typename Traits::XmmRegister dst, typename Traits::XmmRegister src,
     typename Traits::Cond::CmppsCond CmpCondition) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_f64)
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0xC2);
   emitXmmRegisterOperand(dst, src);
   emitUint8(CmpCondition);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cmpps(
     Type Ty, typename Traits::XmmRegister dst,
     const typename Traits::Address &src,
     typename Traits::Cond::CmppsCond CmpCondition) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_f64)
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xC2);
   emitOperand(gprEncoding(dst), src);
   emitUint8(CmpCondition);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::sqrtps(typename Traits::XmmRegister dst) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 110 matching lines @@
   emitUint8(imm.value());
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pshufd(Type /* Ty */,
                                        typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src,
                                        const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x70);
   emitOperand(gprEncoding(dst), src);
   assert(imm.is_uint8());
   emitUint8(imm.value());
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::shufps(Type /* Ty */,
                                        typename Traits::XmmRegister dst,
                                        typename Traits::XmmRegister src,
                                        const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0xC6);
   emitXmmRegisterOperand(dst, src);
   assert(imm.is_uint8());
   emitUint8(imm.value());
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::shufps(Type /* Ty */,
                                        typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src,
                                        const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0xC6);
   emitOperand(gprEncoding(dst), src);
   assert(imm.is_uint8());
   emitUint8(imm.value());
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::sqrtpd(typename Traits::XmmRegister dst) {
@@ skipping 14 matching lines @@
   emitUint8(0x0F);
   emitUint8(0x5B);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvtdq2ps(Type /* Ignore */,
                                          typename Traits::XmmRegister dst,
                                          const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5B);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvttps2dq(Type /* Ignore */,
                                           typename Traits::XmmRegister dst,
                                           typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xF3);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5B);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvttps2dq(Type /* Ignore */,
                                           typename Traits::XmmRegister dst,
                                           const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xF3);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5B);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvtsi2ss(Type DestTy,
                                          typename Traits::XmmRegister dst,
                                          Type SrcTy,
                                          typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
   emitRexRB(SrcTy, dst, src);
   emitUint8(0x0F);
   emitUint8(0x2A);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvtsi2ss(Type DestTy,
                                          typename Traits::XmmRegister dst,
                                          Type SrcTy,
                                          const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(SrcTy, src, dst);
   emitUint8(0x0F);
   emitUint8(0x2A);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvtfloat2float(
     Type SrcTy, typename Traits::XmmRegister dst,
     typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   // ss2sd or sd2ss
   emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x5A);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvtfloat2float(
     Type SrcTy, typename Traits::XmmRegister dst,
     const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x5A);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvttss2si(Type DestTy,
                                           typename Traits::GPRRegister dst,
                                           Type SrcTy,
                                           typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
   emitRexRB(DestTy, dst, src);
   emitUint8(0x0F);
   emitUint8(0x2C);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cvttss2si(Type DestTy,
                                           typename Traits::GPRRegister dst,
                                           Type SrcTy,
                                           const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(DestTy, src, dst);
   emitUint8(0x0F);
   emitUint8(0x2C);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::ucomiss(Type Ty, typename Traits::XmmRegister a,
                                         typename Traits::XmmRegister b) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_f64)
     emitUint8(0x66);
   emitRexRB(RexTypeIrrelevant, a, b);
   emitUint8(0x0F);
   emitUint8(0x2E);
   emitXmmRegisterOperand(a, b);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::ucomiss(Type Ty, typename Traits::XmmRegister a,
                                         const typename Traits::Address &b) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_f64)
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, b, a);
   emitUint8(0x0F);
   emitUint8(0x2E);
   emitOperand(gprEncoding(a), b);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::movmskpd(typename Traits::GPRRegister dst,
                                          typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 13 matching lines @@
   emitUint8(0x50);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::sqrtss(Type Ty,
                                        typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x51);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::sqrtss(Type Ty,
                                        typename Traits::XmmRegister dst,
                                        typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
   emitRexRB(RexTypeIrrelevant, dst, src);
   emitUint8(0x0F);
   emitUint8(0x51);
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::xorps(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (!isFloat32Asserting32Or64(Ty))
     emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x57);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::xorps(Type Ty, typename Traits::XmmRegister dst,
                                       typename Traits::XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 26 matching lines @@
 template <class Machine>
 void AssemblerX86Base<Machine>::insertps(Type Ty,
                                          typename Traits::XmmRegister dst,
                                          const typename Traits::Address &src,
                                          const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(imm.is_uint8());
   assert(isVectorFloatingType(Ty));
   (void)Ty;
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   emitUint8(0x3A);
   emitUint8(0x21);
   emitOperand(gprEncoding(dst), src);
   emitUint8(imm.value());
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pinsr(Type Ty, typename Traits::XmmRegister dst,
@@ skipping 14 matching lines @@
   emitUint8(imm.value());
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pinsr(Type Ty, typename Traits::XmmRegister dst,
                                       const typename Traits::Address &src,
                                       const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(imm.is_uint8());
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (Ty == IceType_i16) {
     emitUint8(0xC4);
   } else {
     emitUint8(0x3A);
     emitUint8(isByteSizedType(Ty) ? 0x20 : 0x22);
   }
   emitOperand(gprEncoding(dst), src);
   emitUint8(imm.value());
@@ skipping 54 matching lines @@
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pcmpeq(Type Ty,
                                        typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty)) {
     emitUint8(0x74);
   } else if (Ty == IceType_i16) {
     emitUint8(0x75);
   } else {
     emitUint8(0x76);
   }
   emitOperand(gprEncoding(dst), src);
@@ skipping 16 matching lines @@
   }
   emitXmmRegisterOperand(dst, src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::pcmpgt(Type Ty,
                                        typename Traits::XmmRegister dst,
                                        const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
   emitRex(RexTypeIrrelevant, src, dst);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty)) {
     emitUint8(0x64);
   } else if (Ty == IceType_i16) {
     emitUint8(0x65);
   } else {
     emitUint8(0x66);
   }
   emitOperand(gprEncoding(dst), src);
@@ skipping 11 matching lines @@
   emitUint8(0x0B);
   emitXmmRegisterOperand(dst, src);
   // Mask precision exeption.
   emitUint8(static_cast<uint8_t>(mode) | 0x8);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fnstcw(const typename T::Address &dst) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(0xD9);
   emitOperand(7, dst);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fldcw(const typename T::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(0xD9);
   emitOperand(5, src);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fistpl(const typename T::Address &dst) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(0xDF);
   emitOperand(7, dst);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fistps(const typename T::Address &dst) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(0xDB);
   emitOperand(3, dst);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::fildl(const typename T::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(0xDF);
   emitOperand(5, src);
 }
 
 template <class Machine>
 template <typename T, typename>
 void AssemblerX86Base<Machine>::filds(const typename T::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitUint8(0xDB);
   emitOperand(0, src);
 }
 
 template <class Machine>
 template <typename, typename>
 void AssemblerX86Base<Machine>::fincstp() {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0xD9);
   emitUint8(0xF7);
@@ skipping 35 matching lines @@
 
 template <class Machine>
 template <uint32_t Tag>
 void AssemblerX86Base<Machine>::arith_int(
     Type Ty, typename Traits::GPRRegister reg,
     const typename Traits::Address &address) {
   static_assert(Tag < 8, "Tag must be between 0..7");
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, reg);
   if (isByteSizedType(Ty))
     emitUint8(Tag * 8 + 2);
   else
     emitUint8(Tag * 8 + 3);
   emitOperand(gprEncoding(reg), address);
 }
 
 template <class Machine>
 template <uint32_t Tag>
 void AssemblerX86Base<Machine>::arith_int(
     Type Ty, const typename Traits::Address &address,
     typename Traits::GPRRegister reg) {
   static_assert(Tag < 8, "Tag must be between 0..7");
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, reg);
   if (isByteSizedType(Ty))
     emitUint8(Tag * 8 + 0);
   else
     emitUint8(Tag * 8 + 1);
   emitOperand(gprEncoding(reg), address);
 }
 
 template <class Machine>
 template <uint32_t Tag>
 void AssemblerX86Base<Machine>::arith_int(
     Type Ty, const typename Traits::Address &address, const Immediate &imm) {
   static_assert(Tag < 8, "Tag must be between 0..7");
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, RexRegIrrelevant);
   if (isByteSizedType(Ty)) {
     emitComplexI8(Tag, address, imm);
   } else {
     emitComplex(Ty, Tag, address, imm);
   }
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cmp(Type Ty, typename Traits::GPRRegister reg,
@@ skipping 41 matching lines @@
   emitRegisterOperand(gprEncoding(reg1), gprEncoding(reg2));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::test(Type Ty,
                                      const typename Traits::Address &addr,
                                      typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, addr, reg);
   if (isByteSizedType(Ty))
     emitUint8(0x84);
   else
     emitUint8(0x85);
   emitOperand(gprEncoding(reg), addr);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::test(Type Ty, typename Traits::GPRRegister reg,
@@ skipping 32 matching lines @@
 
 template <class Machine>
 void AssemblerX86Base<Machine>::test(Type Ty,
                                      const typename Traits::Address &addr,
                                      const Immediate &immediate) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   // If the immediate is short, we only test the byte addr to keep the encoding
   // short.
   if (immediate.is_uint8()) {
     // Use zero-extended 8-bit immediate.
+    emitAddrSizeOverridePrefix();
     emitRex(Ty, addr, RexRegIrrelevant);
     emitUint8(0xF6);
     emitOperand(0, addr);
     emitUint8(immediate.value() & 0xFF);
   } else {
     if (Ty == IceType_i16)
       emitOperandSizeOverride();
+    emitAddrSizeOverridePrefix();
     emitRex(Ty, addr, RexRegIrrelevant);
     emitUint8(0xF7);
     emitOperand(0, addr);
     emitImmediate(Ty, immediate);
   }
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::And(Type Ty, typename Traits::GPRRegister dst,
                                     typename Traits::GPRRegister src) {
@@ skipping 256 matching lines @@
     emitUint8(0xF7);
   emitRegisterOperand(6, gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::div(Type Ty,
                                     const typename Traits::Address &addr) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, addr, RexRegIrrelevant);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitOperand(6, addr);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::idiv(Type Ty,
                                      typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexB(Ty, reg);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitRegisterOperand(7, gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::idiv(Type Ty,
                                      const typename Traits::Address &addr) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, addr, RexRegIrrelevant);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitOperand(7, addr);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::imul(Type Ty, typename Traits::GPRRegister dst,
@@ skipping 10 matching lines @@
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::imul(Type Ty, typename Traits::GPRRegister reg,
                                      const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(Ty == IceType_i16 || Ty == IceType_i32 ||
          (Traits::Is64Bit && Ty == IceType_i64));
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, reg);
   emitUint8(0x0F);
   emitUint8(0xAF);
   emitOperand(gprEncoding(reg), address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::imul(Type Ty, typename Traits::GPRRegister reg,
                                      const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 25 matching lines @@
     emitUint8(0xF7);
   emitRegisterOperand(5, gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::imul(Type Ty,
                                      const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, RexRegIrrelevant);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitOperand(5, address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::imul(Type Ty, typename Traits::GPRRegister dst,
@@ skipping 16 matching lines @@
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::imul(Type Ty, typename Traits::GPRRegister dst,
                                      const typename Traits::Address &address,
                                      const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(Ty == IceType_i16 || Ty == IceType_i32);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, dst);
   if (imm.is_int8()) {
     emitUint8(0x6B);
     emitOperand(gprEncoding(dst), address);
     emitUint8(imm.value() & 0xFF);
   } else {
     emitUint8(0x69);
     emitOperand(gprEncoding(dst), address);
     emitImmediate(Ty, imm);
   }
@@ skipping 11 matching lines @@
     emitUint8(0xF7);
   emitRegisterOperand(4, gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::mul(Type Ty,
                                     const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, RexRegIrrelevant);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitOperand(4, address);
 }
 
 template <class Machine>
 template <typename, typename>
 void AssemblerX86Base<Machine>::incl(typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x40 + reg);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::incl(const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(IceType_i32, address, RexRegIrrelevant);
   emitUint8(0xFF);
   emitOperand(0, address);
 }
 
 template <class Machine>
 template <typename, typename>
 void AssemblerX86Base<Machine>::decl(typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   emitUint8(0x48 + reg);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::decl(const typename Traits::Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitAddrSizeOverridePrefix();
   emitRex(IceType_i32, address, RexRegIrrelevant);
   emitUint8(0xFF);
   emitOperand(1, address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::rol(Type Ty, typename Traits::GPRRegister reg,
                                     const Immediate &imm) {
   emitGenericShift(0, Ty, reg, imm);
 }
@@ skipping 102 matching lines @@
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::shld(Type Ty,
                                      const typename Traits::Address &operand,
                                      typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(Ty == IceType_i16 || Ty == IceType_i32);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, operand, src);
   emitUint8(0x0F);
   emitUint8(0xA5);
   emitOperand(gprEncoding(src), operand);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::shrd(Type Ty, typename Traits::GPRRegister dst,
                                      typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 23 matching lines @@
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::shrd(Type Ty,
                                      const typename Traits::Address &dst,
                                      typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   assert(Ty == IceType_i16 || Ty == IceType_i32);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, dst, src);
   emitUint8(0x0F);
   emitUint8(0xAD);
   emitOperand(gprEncoding(src), dst);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::neg(Type Ty, typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexB(Ty, reg);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitRegisterOperand(3, gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::neg(Type Ty,
                                     const typename Traits::Address &addr) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, addr, RexRegIrrelevant);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitOperand(3, addr);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::notl(typename Traits::GPRRegister reg) {
@@ skipping 10 matching lines @@
   assert(Ty == IceType_i32 || (Traits::Is64Bit && Ty == IceType_i64));
   emitRexB(Ty, reg);
   emitUint8(0x0F);
   emitUint8(0xC8 | gprEncoding(reg));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::bsf(Type Ty, typename Traits::GPRRegister dst,
                                     typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
-  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  assert(Ty == IceType_i16 || Ty == IceType_i32 ||
+         (Traits::Is64Bit && Ty == IceType_i64));
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexRB(Ty, dst, src);
   emitUint8(0x0F);
   emitUint8(0xBC);
   emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::bsf(Type Ty, typename Traits::GPRRegister dst,
                                     const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
-  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  assert(Ty == IceType_i16 || Ty == IceType_i32 ||
+         (Traits::Is64Bit && Ty == IceType_i64));
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, src, dst);
   emitUint8(0x0F);
   emitUint8(0xBC);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::bsr(Type Ty, typename Traits::GPRRegister dst,
                                     typename Traits::GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
-  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  assert(Ty == IceType_i16 || Ty == IceType_i32 ||
+         (Traits::Is64Bit && Ty == IceType_i64));
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexRB(Ty, dst, src);
   emitUint8(0x0F);
   emitUint8(0xBD);
   emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::bsr(Type Ty, typename Traits::GPRRegister dst,
                                     const typename Traits::Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
-  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  assert(Ty == IceType_i16 || Ty == IceType_i32 ||
+         (Traits::Is64Bit && Ty == IceType_i64));
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, src, dst);
   emitUint8(0x0F);
   emitUint8(0xBD);
   emitOperand(gprEncoding(dst), src);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::bt(typename Traits::GPRRegister base,
                                    typename Traits::GPRRegister offset) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 194 matching lines @@
 template <class Machine>
 void AssemblerX86Base<Machine>::cmpxchg(Type Ty,
                                         const typename Traits::Address &address,
                                         typename Traits::GPRRegister reg,
                                         bool Locked) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   if (Locked)
     emitUint8(0xF0);
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, address, reg);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty))
     emitUint8(0xB0);
   else
     emitUint8(0xB1);
   emitOperand(gprEncoding(reg), address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::cmpxchg8b(
     const typename Traits::Address &address, bool Locked) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Locked)
     emitUint8(0xF0);
+  emitAddrSizeOverridePrefix();
   emitRex(IceType_i32, address, RexRegIrrelevant);
   emitUint8(0x0F);
   emitUint8(0xC7);
   emitOperand(1, address);
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::xadd(Type Ty,
                                      const typename Traits::Address &addr,
                                      typename Traits::GPRRegister reg,
                                      bool Locked) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   if (Locked)
     emitUint8(0xF0);
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, addr, reg);
   emitUint8(0x0F);
   if (isByteSizedArithType(Ty))
     emitUint8(0xC0);
   else
     emitUint8(0xC1);
   emitOperand(gprEncoding(reg), addr);
 }
 
 template <class Machine>
@@ skipping 19 matching lines @@
   }
 }
 
 template <class Machine>
 void AssemblerX86Base<Machine>::xchg(Type Ty,
                                      const typename Traits::Address &addr,
                                      typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
+  emitAddrSizeOverridePrefix();
   emitRex(Ty, addr, reg);
   if (isByteSizedArithType(Ty))
     emitUint8(0x86);
   else
     emitUint8(0x87);
   emitOperand(gprEncoding(reg), addr);
 }
 
 template <class Machine> void AssemblerX86Base<Machine>::iaca_start() {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ skipping 212 matching lines @@
   (void)shifter;
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexB(Ty, operand.rm());
   emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
   emitOperand(rm, operand);
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice