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1 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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82 Vars = Func->allocateArrayOf<Variable *>(NumVars); | 82 Vars = Func->allocateArrayOf<Variable *>(NumVars); |
83 SizeT I = 0; | 83 SizeT I = 0; |
84 if (Base) | 84 if (Base) |
85 Vars[I++] = Base; | 85 Vars[I++] = Base; |
86 if (Index) | 86 if (Index) |
87 Vars[I++] = Index; | 87 Vars[I++] = Index; |
88 assert(I == NumVars); | 88 assert(I == NumVars); |
89 } | 89 } |
90 } | 90 } |
91 | 91 |
92 namespace { | |
93 static int32_t getRematerializableOffset(Variable *Var, | |
94 const Ice::TargetX8664 *Target) { | |
95 int32_t Disp = Var->getStackOffset(); | |
96 SizeT RegNum = static_cast<SizeT>(Var->getRegNum()); | |
97 if (RegNum == Target->getFrameReg()) { | |
98 Disp += Target->getFrameFixedAllocaOffset(); | |
99 } else if (RegNum != Target->getStackReg()) { | |
100 llvm::report_fatal_error("Unexpected rematerializable register type"); | |
101 } | |
102 return Disp; | |
103 } | |
104 } // end of anonymous namespace | |
105 | |
92 void MachineTraits<TargetX8664>::X86OperandMem::emit(const Cfg *Func) const { | 106 void MachineTraits<TargetX8664>::X86OperandMem::emit(const Cfg *Func) const { |
93 if (!BuildDefs::dump()) | 107 if (!BuildDefs::dump()) |
94 return; | 108 return; |
109 const auto *Target = static_cast<const Ice::TargetX8664 *>(Func->getTarget()); | |
110 // If the base is rematerializable, we need to replace it with the correct | |
111 // physical register (esp or ebp), and update the Offset. | |
Jim Stichnoth
2015/12/20 19:27:37
Should that be rsp/rbp?
John
2015/12/21 13:41:31
Not necessarily. Because x32, even though we manip
| |
112 int32_t Disp = 0; | |
113 if (getBase() && getBase()->isRematerializable()) { | |
114 Disp += getRematerializableOffset(getBase(), Target); | |
115 } | |
116 // The index should never be rematerializable. But if we ever allow it, then | |
117 // we should make sure the rematerialization offset is shifted by the Shift | |
118 // value. | |
119 if (getIndex()) | |
120 assert(!getIndex()->isRematerializable()); | |
95 Ostream &Str = Func->getContext()->getStrEmit(); | 121 Ostream &Str = Func->getContext()->getStrEmit(); |
96 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading | 122 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading |
97 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. | 123 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. |
98 if (!Offset) { | 124 if (getOffset() == 0 && Disp == 0) { |
Jim Stichnoth
2015/12/20 19:27:37
Here and below, I think getOffset() should be comp
John
2015/12/21 13:41:31
Done.
| |
99 // No offset, emit nothing. | 125 // No offset, emit nothing. |
126 } else if (getOffset() == 0 && Disp != 0) { | |
127 Str << Disp; | |
100 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { | 128 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { |
101 if (Base == nullptr || CI->getValue()) | 129 if (Base == nullptr || CI->getValue() || Disp != 0) |
102 // Emit a non-zero offset without a leading '$'. | 130 // Emit a non-zero offset without a leading '$'. |
103 Str << CI->getValue(); | 131 Str << CI->getValue() + Disp; |
104 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { | 132 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { |
133 // TODO(sehr): ConstantRelocatable still needs updating for | |
134 // rematerializable base/index and Disp. | |
135 assert(Disp == 0); | |
105 CR->emitWithoutPrefix(Func->getTarget()); | 136 CR->emitWithoutPrefix(Func->getTarget()); |
106 } else { | 137 } else { |
107 llvm_unreachable("Invalid offset type for x86 mem operand"); | 138 llvm_unreachable("Invalid offset type for x86 mem operand"); |
108 } | 139 } |
109 | 140 |
110 if (Base || Index) { | 141 if (Base || Index) { |
111 Str << "("; | 142 Str << "("; |
112 if (Base) | 143 if (Base) |
113 Base->emit(Func); | 144 Base->emit(Func); |
114 if (Index) { | 145 if (Index) { |
115 Str << ","; | 146 Str << ","; |
116 Index->emit(Func); | 147 Index->emit(Func); |
117 if (Shift) | 148 if (Shift) |
118 Str << "," << (1u << Shift); | 149 Str << "," << (1u << Shift); |
119 } | 150 } |
120 Str << ")"; | 151 Str << ")"; |
121 } | 152 } |
122 } | 153 } |
123 | 154 |
124 void MachineTraits<TargetX8664>::X86OperandMem::dump(const Cfg *Func, | 155 void MachineTraits<TargetX8664>::X86OperandMem::dump(const Cfg *Func, |
125 Ostream &Str) const { | 156 Ostream &Str) const { |
126 if (!BuildDefs::dump()) | 157 if (!BuildDefs::dump()) |
127 return; | 158 return; |
128 bool Dumped = false; | 159 bool Dumped = false; |
129 Str << "["; | 160 Str << "["; |
161 int32_t Disp = 0; | |
162 const auto *Target = static_cast<const Ice::TargetX8664 *>(Func->getTarget()); | |
163 if (getBase() && getBase()->isRematerializable()) { | |
164 Disp += getRematerializableOffset(getBase(), Target); | |
165 } | |
130 if (Base) { | 166 if (Base) { |
131 if (Func) | 167 if (Func) |
132 Base->dump(Func); | 168 Base->dump(Func); |
133 else | 169 else |
134 Base->dump(Str); | 170 Base->dump(Str); |
135 Dumped = true; | 171 Dumped = true; |
136 } | 172 } |
137 if (Index) { | 173 if (Index) { |
138 if (Base) | 174 if (Base) |
139 Str << "+"; | 175 Str << "+"; |
140 if (Shift > 0) | 176 if (Shift > 0) |
141 Str << (1u << Shift) << "*"; | 177 Str << (1u << Shift) << "*"; |
142 if (Func) | 178 if (Func) |
143 Index->dump(Func); | 179 Index->dump(Func); |
144 else | 180 else |
145 Index->dump(Str); | 181 Index->dump(Str); |
146 Dumped = true; | 182 Dumped = true; |
147 } | 183 } |
184 if (Disp) { | |
185 if (Disp > 0) | |
186 Str << "+"; | |
187 Str << Disp; | |
188 Dumped = true; | |
189 } | |
148 // Pretty-print the Offset. | 190 // Pretty-print the Offset. |
149 bool OffsetIsZero = false; | 191 bool OffsetIsZero = false; |
150 bool OffsetIsNegative = false; | 192 bool OffsetIsNegative = false; |
151 if (!Offset) { | 193 if (!Offset) { |
152 OffsetIsZero = true; | 194 OffsetIsZero = true; |
153 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { | 195 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { |
154 OffsetIsZero = (CI->getValue() == 0); | 196 OffsetIsZero = (CI->getValue() == 0); |
155 OffsetIsNegative = (static_cast<int32_t>(CI->getValue()) < 0); | 197 OffsetIsNegative = (static_cast<int32_t>(CI->getValue()) < 0); |
156 } else { | 198 } else { |
157 assert(llvm::isa<ConstantRelocatable>(Offset)); | 199 assert(llvm::isa<ConstantRelocatable>(Offset)); |
158 } | 200 } |
159 if (Dumped) { | 201 if (Dumped) { |
160 if (!OffsetIsZero) { // Suppress if Offset is known to be 0 | 202 if (!OffsetIsZero) { // Suppress if Offset is known to be 0 |
161 if (!OffsetIsNegative) // Suppress if Offset is known to be negative | 203 if (!OffsetIsNegative) // Suppress if Offset is known to be negative |
162 Str << "+"; | 204 Str << "+"; |
163 Offset->dump(Func, Str); | 205 Offset->dump(Func, Str); |
164 } | 206 } |
165 } else { | 207 } else { |
166 // There is only the offset. | 208 // There is only the offset. |
167 Offset->dump(Func, Str); | 209 Offset->dump(Func, Str); |
168 } | 210 } |
169 Str << "]"; | 211 Str << "]"; |
170 } | 212 } |
171 | 213 |
172 MachineTraits<TargetX8664>::Address | 214 MachineTraits<TargetX8664>::Address |
173 MachineTraits<TargetX8664>::X86OperandMem::toAsmAddress( | 215 MachineTraits<TargetX8664>::X86OperandMem::toAsmAddress( |
174 MachineTraits<TargetX8664>::Assembler *Asm, | 216 MachineTraits<TargetX8664>::Assembler *Asm, |
175 const Ice::TargetLowering *Target) const { | 217 const Ice::TargetLowering *TargetLowering) const { |
176 // TODO(sehr): handle rematerializable base/index. | 218 const auto *Target = static_cast<const Ice::TargetX8664 *>(TargetLowering); |
177 (void)Target; | 219 (void)Target; |
Jim Stichnoth
2015/12/20 19:27:37
remove this
John
2015/12/21 13:41:31
Done.
| |
178 if (getBase()) | 220 int32_t Disp = 0; |
179 assert(!getBase()->isRematerializable()); | 221 if (getBase() && getBase()->isRematerializable()) { |
222 Disp += getRematerializableOffset(getBase(), Target); | |
223 } | |
180 if (getIndex()) | 224 if (getIndex()) |
181 assert(!getIndex()->isRematerializable()); | 225 assert(!getIndex()->isRematerializable()); |
182 int32_t Disp = 0; | |
183 AssemblerFixup *Fixup = nullptr; | 226 AssemblerFixup *Fixup = nullptr; |
184 // Determine the offset (is it relocatable?) | 227 // Determine the offset (is it relocatable?) |
185 if (getOffset()) { | 228 if (getOffset()) { |
186 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 229 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
187 Disp = static_cast<int32_t>(CI->getValue()); | 230 Disp += static_cast<int32_t>(CI->getValue()); |
188 } else if (const auto CR = | 231 } else if (const auto CR = |
189 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { | 232 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |
190 Disp = CR->getOffset() - 4; | 233 Disp += CR->getOffset(); |
191 Fixup = Asm->createFixup(PcRelFixup, CR); | 234 Fixup = Asm->createFixup(RelFixup, CR); |
192 } else { | 235 } else { |
193 llvm_unreachable("Unexpected offset type"); | 236 llvm_unreachable("Unexpected offset type"); |
194 } | 237 } |
195 } | 238 } |
196 | 239 |
197 // Now convert to the various possible forms. | 240 // Now convert to the various possible forms. |
198 if (getBase() && getIndex()) { | 241 if (getBase() && getIndex()) { |
199 return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), | 242 return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), |
200 getEncodedGPR(getIndex()->getRegNum()), | 243 getEncodedGPR(getIndex()->getRegNum()), |
201 X8664::Traits::ScaleFactor(getShift()), Disp, | 244 X8664::Traits::ScaleFactor(getShift()), Disp, |
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252 Var->dump(Func); | 295 Var->dump(Func); |
253 else | 296 else |
254 Var->dump(Str); | 297 Var->dump(Str); |
255 Str << ")"; | 298 Str << ")"; |
256 } | 299 } |
257 | 300 |
258 } // namespace X86Internal | 301 } // namespace X86Internal |
259 } // end of namespace Ice | 302 } // end of namespace Ice |
260 | 303 |
261 X86INSTS_DEFINE_STATIC_DATA(TargetX8664) | 304 X86INSTS_DEFINE_STATIC_DATA(TargetX8664) |
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