Refactor PUSH/POP in ARM assemblers.

src/IceAssemblerARM32.h

Index: src/IceAssemblerARM32.h
diff --git a/src/IceAssemblerARM32.h b/src/IceAssemblerARM32.h
index 46478b63957346769942f50146a5e0b734528523..8003ef783c75bcc13c068d78602ec12e1b279823 100644
--- a/src/IceAssemblerARM32.h
+++ b/src/IceAssemblerARM32.h
@@ -255,15 +255,19 @@ public:
   void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
-  void pop(const Operand *OpRt, CondARM32::Cond Cond);
+  template <AssemblyOutputForm>

[John, 2016/01/04 15:27:49]

The idea of the assembler emitting textual output is very confusing. Plus, this
feature is only available for select instructions, which makes matters even more
confusing. I would say no assembler should emit textual output.

[Karl, 2016/01/05 17:43:03]

Refactored so that textual generation is only in IceInstARM32.cpp.

+  void pop(const Cfg *Cfg, const Operand *OpRt, CondARM32::Cond Cond);
 
   // Note: Registers is a bitset, where bit n corresponds to register Rn.
-  void popList(const IValueT Registers, CondARM32::Cond Cond);
+  template <AssemblyOutputForm>
+  void popList(const Cfg *Cfg, const IValueT Registers, CondARM32::Cond Cond);
 
-  void push(const Operand *OpRt, CondARM32::Cond Cond);
+  template <AssemblyOutputForm>
+  void push(const Cfg *Func, const Operand *OpRt, CondARM32::Cond Cond);
 
   // Note: Registers is a bitset, where bit n corresponds to register Rn.
-  void pushList(const IValueT Registers, CondARM32::Cond Cond);
+  template <AssemblyOutputForm>
+  void pushList(const Cfg *Func, const IValueT Registers, CondARM32::Cond Cond);
 
   void rbit(const Operand *OpRd, const Operand *OpRm, CondARM32::Cond Cond);
 
@@ -318,10 +322,12 @@ public:
   // Implements uxtb/uxth depending on type of OpSrc0.
   void uxt(const Operand *OpRd, const Operand *OpSrc0, CondARM32::Cond Cond);
 
-  void vpop(const Variable *OpBaseReg, SizeT NumConsecRegs,
+  template <AssemblyOutputForm Form>
+  void vpop(const Cfg *Func, const Variable *OpBaseReg, SizeT NumConsecRegs,
             CondARM32::Cond Cond);
 
-  void vpush(const Variable *OpBaseReg, SizeT NumConsecRegs,
+  template <AssemblyOutputForm Form>
+  void vpush(const Cfg *Func, const Variable *OpBaseReg, SizeT NumConsecRegs,
              CondARM32::Cond Cond);
 
   static bool classof(const Assembler *Asm) {
@@ -422,10 +428,17 @@ private:
 
   // Pattern ccccxxxxxDxxxxxxddddxxxxiiiiiiii where cccc=Cond, ddddD=BaseReg,
   // iiiiiiii=NumConsecRegs, and xxxxx0xxxxxx0000xxxx00000000=Opcode.
-  void emitVStackOp(CondARM32::Cond Cond, IValueT Opcode,
+  template <AssemblyOutputForm Form>
+  void emitVStackOp(const Cfg *Func, CondARM32::Cond Cond, IValueT Opcode,
                     const Variable *OpBaseReg, SizeT NumConsecRegs,
                     const char *InstName);
 
+  void emitStackTextOp(const Cfg *Func, const IValueT Registers,
+                       CondARM32::Cond Cond, const char *InstName);
+
+  void emitStackTextOp(const Cfg *Func, const Operand *OpRt,
+                       CondARM32::Cond Cond, const char *InstName);
+
   // Pattern cccc011100x1dddd1111mmmm0001nnn where cccc=Cond,
   // x=Opcode, dddd=Rd, nnnn=Rn, mmmm=Rm.
   void emitDivOp(CondARM32::Cond Cond, IValueT Opcode, IValueT Rd, IValueT Rn,