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Unified Diff: src/IceInstARM32.cpp

Issue 1535233002: Refactor PUSH/POP in ARM assemblers. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Do some more cleanups. Created 4 years, 11 months ago
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« src/IceInstARM32.h ('K') | « src/IceInstARM32.h ('k') | src/IceRegistersARM32.h » ('j') | src/IceRegistersARM32.h » ('J')
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Index: src/IceInstARM32.cpp
diff --git a/src/IceInstARM32.cpp b/src/IceInstARM32.cpp
index 4919600ddb228355fd2b09f7deca52563fa18c8e..349fb8b2e8173aa97c2961cb63a8ec2a0fdc71d9 100644
--- a/src/IceInstARM32.cpp
+++ b/src/IceInstARM32.cpp
@@ -628,8 +628,130 @@ void validatePushOrPopRegisterListOrDie(const VarList &RegList) {
}
} // end of anonymous namespace
+void InstARM32RegisterStackOp::emit(const Cfg *Func) const {
+ if (!BuildDefs::dump())
+ return;
+ emitUsingForm(Func, TextualOutput);
+}
+
+void InstARM32RegisterStackOp::emitIAS(const Cfg *Func) const {
+ emitUsingForm(Func, BinaryOutput);
+ assert(!Func->getAssembler<ARM32::AssemblerARM32>()->needsTextFixup());
+}
+
+void InstARM32RegisterStackOp::dump(const Cfg *Func) const {
+ if (!BuildDefs::dump())
+ return;
+ Ostream &Str = Func->getContext()->getStrDump();
+ Str << getOpcode() << " ";
+ SizeT NumRegs = getNumStackRegs();
+ for (SizeT I = 0; I < NumRegs; ++I) {
+ if (I > 0)
+ Str << ", ";
+ getStackReg(I)->dump(Func);
+ }
+}
+
+void InstARM32RegisterStackOp::emitGPRsAsText(const Cfg *Func) const {
+ if (!BuildDefs::dump())
+ return;
+ Ostream &Str = Func->getContext()->getStrEmit();
+ Str << "\t" << getOpcode() << "\t{";
+ getStackReg(0)->emit(Func);
+ const SizeT NumRegs = getNumStackRegs();
+ for (SizeT i = 1; i < NumRegs; ++i) {
+ Str << ", ";
+ getStackReg(i)->emit(Func);
+ }
+ Str << "}";
+}
+
+void InstARM32RegisterStackOp::emitSRegsAsText(const Cfg *Func,
+ const Variable *BaseReg,
+ SizeT RegCount) const {
+ if (!BuildDefs::dump())
+ return;
+ Ostream &Str = Func->getContext()->getStrEmit();
+ Str << "\t"
+ << "v" << getOpcode() << "\t{";
John 2016/01/11 13:40:36 optional: I am not a big fan of this strategy. I p
Karl 2016/01/11 17:59:44 Fixed by adding virtual to differentiate GPR opcod
+ bool IsFirst = true;
+ IValueT Base = RegARM32::getEncodedSReg(BaseReg->getRegNum());
+ for (SizeT i = 0; i < RegCount; ++i) {
+ if (IsFirst)
+ IsFirst = false;
+ else
+ Str << ", ";
+ Str << RegARM32::getSRegName(Base + i);
+ }
+ Str << "}";
+}
+
+namespace {
+
+bool isAssignedConsecutiveRegisters(const Variable *Before,
+ const Variable *After) {
+ assert(Before->hasReg());
+ assert(After->hasReg());
+ return Before->getRegNum() + 1 == After->getRegNum();
+}
+
+} // end of anonymous namespace
+
+void InstARM32RegisterStackOp::emitUsingForm(const Cfg *Func,
+ const OutputForm Form) const {
+ SizeT NumRegs = getNumStackRegs();
+ assert(NumRegs);
+
+ const auto *Reg = llvm::cast<Variable>(getStackReg(0));
+ if (isScalarIntegerType(Reg->getType())) {
+ // Pop GPR registers.
+ SizeT IntegerCount = 0;
+ ARM32::IValueT GPRegisters = 0;
+ const Variable *LastDest = nullptr;
+ for (SizeT i = 0; i < NumRegs; ++i) {
+ const Variable *Var = getStackReg(i);
+ assert(Var->hasReg() && "stack op only applies to registers");
+ int32_t Reg = RegARM32::getEncodedGPR(Var->getRegNum());
+ LastDest = Var;
+ GPRegisters |= (1 << Reg);
+ ++IntegerCount;
+ }
+ if (IntegerCount == 1) {
+ emitSingleGPR(Func, Form, LastDest);
+ } else {
+ emitMultipleGPRs(Func, Form, GPRegisters);
+ }
+ } else {
+ // Pop vector/floating point registers.
+ const Variable *BaseReg = nullptr;
+ SizeT RegCount = 0;
+ for (SizeT i = 0; i < NumRegs; ++i) {
+ const Variable *NextReg = getStackReg(i);
+ if (BaseReg == nullptr) {
+ BaseReg = NextReg;
+ RegCount = 1;
+ } else if (RegCount < VpushVpopMaxConsecRegs &&
+ isAssignedConsecutiveRegisters(Reg, NextReg)) {
+ ++RegCount;
+ } else {
+ emitSRegs(Func, Form, BaseReg, RegCount);
+ if (Form == TextualOutput && BuildDefs::dump()) {
+ startNextInst(Func);
+ Func->getContext()->getStrEmit() << "\n";
+ }
+ BaseReg = NextReg;
+ RegCount = 1;
+ }
+ Reg = NextReg;
+ }
+ if (RegCount) {
+ emitSRegs(Func, Form, BaseReg, RegCount);
+ }
+ }
+}
+
InstARM32Pop::InstARM32Pop(Cfg *Func, const VarList &Dests)
- : InstARM32(Func, InstARM32::Pop, 0, nullptr), Dests(Dests) {
+ : InstARM32RegisterStackOp(Func, InstARM32::Pop, 0, nullptr), Dests(Dests) {
// Track modifications to Dests separately via FakeDefs. Also, a pop
// instruction affects the stack pointer and so it should not be allowed to
// be automatically dead-code eliminated. This is automatic since we leave
@@ -638,7 +760,7 @@ InstARM32Pop::InstARM32Pop(Cfg *Func, const VarList &Dests)
}
InstARM32Push::InstARM32Push(Cfg *Func, const VarList &Srcs)
- : InstARM32(Func, InstARM32::Push, Srcs.size(), nullptr) {
+ : InstARM32RegisterStackOp(Func, InstARM32::Push, Srcs.size(), nullptr) {
validatePushOrPopRegisterListOrDie(Srcs);
for (Variable *Source : Srcs) {
addSource(Source);
@@ -1313,278 +1435,94 @@ template <> void InstARM32Uxt::emitIAS(const Cfg *Func) const {
emitUsingTextFixup(Func);
}
-namespace {
+const char *InstARM32Pop::getOpcode() const { return "pop"; }
-bool isAssignedConsecutiveRegisters(const Variable *Before,
- const Variable *After) {
- assert(Before->hasReg());
- assert(After->hasReg());
- return Before->getRegNum() + 1 == After->getRegNum();
-}
+Variable *InstARM32Pop::getStackReg(SizeT Index) const { return Dests[Index]; }
-} // end of anonymous namespace
+SizeT InstARM32Pop::getNumStackRegs() const { return Dests.size(); }
-void InstARM32Pop::emit(const Cfg *Func) const {
- if (!BuildDefs::dump())
+void InstARM32Pop::emitSingleGPR(const Cfg *Func, const OutputForm Form,
+ const Variable *Reg) const {
+ switch (Form) {
+ case TextualOutput:
+ emitGPRsAsText(Func);
return;
-
- const SizeT DestSize = Dests.size();
- if (DestSize == 0) {
- assert(false && "Empty pop list");
+ case BinaryOutput:
+ Func->getAssembler<ARM32::AssemblerARM32>()->pop(Reg, CondARM32::AL);
return;
}
-
- Ostream &Str = Func->getContext()->getStrEmit();
-
- Variable *Reg = Dests[0];
- if (isScalarIntegerType(Reg->getType())) {
- // GPR push.
- Str << "\t"
- "pop"
- "\t{";
- Reg->emit(Func);
- for (SizeT i = 1; i < DestSize; ++i) {
- Str << ", ";
- Reg = Dests[i];
- Reg->emit(Func);
- }
- Str << "}";
- return;
- }
-
- // VFP "s" reg push.
- SizeT End = DestSize - 1;
- SizeT Start = DestSize - 1;
- Reg = Dests[DestSize - 1];
- Str << "\t"
- "vpop"
- "\t{";
- for (SizeT i = 2; i <= DestSize; ++i) {
- Variable *PreviousReg = Dests[DestSize - i];
- if (!isAssignedConsecutiveRegisters(PreviousReg, Reg)) {
- Dests[Start]->emit(Func);
- for (SizeT j = Start + 1; j <= End; ++j) {
- Str << ", ";
- Dests[j]->emit(Func);
- }
- startNextInst(Func);
- Str << "}\n\t"
- "vpop"
- "\t{";
- End = DestSize - i;
- }
- Reg = PreviousReg;
- Start = DestSize - i;
- }
- Dests[Start]->emit(Func);
- for (SizeT j = Start + 1; j <= End; ++j) {
- Str << ", ";
- Dests[j]->emit(Func);
- }
- Str << "}";
}
-void InstARM32Pop::emitIAS(const Cfg *Func) const {
- // Pop can't be emitted if there are no registers to load. This should never
- // happen, but if it does, we don't need to bring Subzero down -- we just skip
- // emitting the pop instruction (and maybe emit a nop?) The assert() is here
- // so that we can detect this error during development.
- const SizeT DestSize = Dests.size();
- if (DestSize == 0) {
- assert(false && "Empty pop list");
+void InstARM32Pop::emitMultipleGPRs(const Cfg *Func, const OutputForm Form,
+ IValueT Registers) const {
+ switch (Form) {
+ case TextualOutput:
+ emitGPRsAsText(Func);
+ return;
+ case BinaryOutput:
+ Func->getAssembler<ARM32::AssemblerARM32>()->popList(Registers,
+ CondARM32::AL);
return;
}
-
- auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
- const auto *Reg = llvm::cast<Variable>(Dests[0]);
- if (isScalarIntegerType(Reg->getType())) {
- // Pop GPR registers.
- SizeT IntegerCount = 0;
- ARM32::IValueT GPRegisters = 0;
- const Variable *LastDest = nullptr;
- for (const Variable *Var : Dests) {
- assert(Var->hasReg() && "pop only applies to registers");
- int32_t Reg = RegARM32::getEncodedGPR(Var->getRegNum());
- LastDest = Var;
- GPRegisters |= (1 << Reg);
- ++IntegerCount;
- }
- switch (IntegerCount) {
- case 0:
- return;
- case 1:
- // Note: Can only apply pop register if single register is not sp.
- assert((RegARM32::Encoded_Reg_sp != LastDest->getRegNum()) &&
- "Effects of pop register SP is undefined!");
- Asm->pop(LastDest, CondARM32::AL);
- break;
- default:
- Asm->popList(GPRegisters, CondARM32::AL);
- break;
- }
- } else {
- // Pop vector/floating point registers.
- const Variable *BaseReg = nullptr;
- SizeT RegCount = 0;
- for (const Variable *NextReg : Dests) {
- if (BaseReg == nullptr) {
- BaseReg = NextReg;
- RegCount = 1;
- } else if (RegCount < VpushVpopMaxConsecRegs &&
- isAssignedConsecutiveRegisters(Reg, NextReg)) {
- ++RegCount;
- } else {
- Asm->vpop(BaseReg, RegCount, CondARM32::AL);
- BaseReg = NextReg;
- RegCount = 1;
- }
- Reg = NextReg;
- }
- if (RegCount)
- Asm->vpop(BaseReg, RegCount, CondARM32::AL);
- }
- if (Asm->needsTextFixup())
- emitUsingTextFixup(Func);
}
-void InstARM32Pop::dump(const Cfg *Func) const {
- if (!BuildDefs::dump())
+void InstARM32Pop::emitSRegs(const Cfg *Func, const OutputForm Form,
+ const Variable *BaseReg, SizeT RegCount) const {
+ switch (Form) {
+ case TextualOutput:
+ emitSRegsAsText(Func, BaseReg, RegCount);
+ return;
+ case BinaryOutput:
+ Func->getAssembler<ARM32::AssemblerARM32>()->vpop(BaseReg, RegCount,
+ CondARM32::AL);
return;
- Ostream &Str = Func->getContext()->getStrDump();
- Str << "pop"
- << " ";
- for (SizeT I = 0; I < Dests.size(); ++I) {
- if (I > 0)
- Str << ", ";
- Dests[I]->dump(Func);
}
}
-void InstARM32Push::emit(const Cfg *Func) const {
- if (!BuildDefs::dump())
- return;
+const char *InstARM32Push::getOpcode() const { return "push"; }
- // Push can't be emitted if there are no registers to save. This should never
- // happen, but if it does, we don't need to bring Subzero down -- we just skip
- // emitting the push instruction (and maybe emit a nop?) The assert() is here
- // so that we can detect this error during development.
- const SizeT SrcSize = getSrcSize();
- if (SrcSize == 0) {
- assert(false && "Empty push list");
- return;
- }
+Variable *InstARM32Push::getStackReg(SizeT Index) const {
+ return llvm::cast<Variable>(getSrc(Index));
+}
- Ostream &Str = Func->getContext()->getStrEmit();
+SizeT InstARM32Push::getNumStackRegs() const { return getSrcSize(); }
- const auto *Reg = llvm::cast<Variable>(getSrc(0));
- if (isScalarIntegerType(Reg->getType())) {
- // GPR push.
- Str << "\t"
- "push"
- "\t{";
- Reg->emit(Func);
- for (SizeT i = 1; i < SrcSize; ++i) {
- Str << ", ";
- getSrc(i)->emit(Func);
- }
- Str << "}";
+void InstARM32Push::emitSingleGPR(const Cfg *Func, const OutputForm Form,
+ const Variable *Reg) const {
+ switch (Form) {
+ case TextualOutput:
+ emitGPRsAsText(Func);
+ return;
+ case BinaryOutput:
+ Func->getAssembler<ARM32::AssemblerARM32>()->push(Reg, CondARM32::AL);
return;
}
-
- // VFP "s" reg push.
- Str << "\t"
- "vpush"
- "\t{";
- Reg->emit(Func);
- SizeT RegCount = 1;
- for (SizeT i = 1; i < SrcSize; ++i) {
- const auto *NextReg = llvm::cast<Variable>(getSrc(i));
- if (RegCount < VpushVpopMaxConsecRegs &&
- isAssignedConsecutiveRegisters(Reg, NextReg)) {
- ++RegCount;
- Str << ", ";
- } else {
- startNextInst(Func);
- RegCount = 1;
- Str << "}\n\t"
- "vpush"
- "\t{";
- }
- Reg = NextReg;
- Reg->emit(Func);
- }
- Str << "}";
}
-void InstARM32Push::emitIAS(const Cfg *Func) const {
- // Push can't be emitted if there are no registers to save. This should never
- // happen, but if it does, we don't need to bring Subzero down -- we just skip
- // emitting the push instruction (and maybe emit a nop?) The assert() is here
- // so that we can detect this error during development.
- const SizeT SrcSize = getSrcSize();
- if (SrcSize == 0) {
- assert(false && "Empty push list");
+void InstARM32Push::emitMultipleGPRs(const Cfg *Func, const OutputForm Form,
+ IValueT Registers) const {
+ switch (Form) {
+ case TextualOutput:
+ emitGPRsAsText(Func);
+ return;
+ case BinaryOutput:
+ Func->getAssembler<ARM32::AssemblerARM32>()->pushList(Registers,
+ CondARM32::AL);
return;
}
-
- auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
- const auto *Reg = llvm::cast<Variable>(getSrc(0));
- if (isScalarIntegerType(Reg->getType())) {
- // Push GPR registers.
- SizeT IntegerCount = 0;
- ARM32::IValueT GPRegisters = 0;
- const Variable *LastSrc = nullptr;
- for (SizeT Index = 0; Index < getSrcSize(); ++Index) {
- const auto *Var = llvm::cast<Variable>(getSrc(Index));
- int32_t Reg = RegARM32::getEncodedGPR(Var->getRegNum());
- assert(Reg != RegARM32::Encoded_Not_GPR);
- LastSrc = Var;
- GPRegisters |= (1 << Reg);
- ++IntegerCount;
- }
- switch (IntegerCount) {
- case 0:
- return;
- case 1: {
- // Note: Can only apply push register if single register is not sp.
- assert((RegARM32::Encoded_Reg_sp != LastSrc->getRegNum()) &&
- "Effects of push register SP is undefined!");
- Asm->push(LastSrc, CondARM32::AL);
- break;
- }
- default:
- Asm->pushList(GPRegisters, CondARM32::AL);
- break;
- }
- } else {
- // Push vector/Floating point registers.
- const Variable *BaseReg = Reg;
- SizeT RegCount = 1;
- for (SizeT i = 1; i < SrcSize; ++i) {
- const auto *NextReg = llvm::cast<Variable>(getSrc(i));
- if (RegCount < VpushVpopMaxConsecRegs &&
- isAssignedConsecutiveRegisters(Reg, NextReg)) {
- ++RegCount;
- } else {
- Asm->vpush(BaseReg, RegCount, CondARM32::AL);
- BaseReg = NextReg;
- RegCount = 1;
- }
- Reg = NextReg;
- }
- Asm->vpush(BaseReg, RegCount, CondARM32::AL);
- }
- if (Asm->needsTextFixup())
- emitUsingTextFixup(Func);
}
-void InstARM32Push::dump(const Cfg *Func) const {
- if (!BuildDefs::dump())
+void InstARM32Push::emitSRegs(const Cfg *Func, const OutputForm Form,
+ const Variable *BaseReg, SizeT RegCount) const {
+ switch (Form) {
+ case TextualOutput:
+ emitSRegsAsText(Func, BaseReg, RegCount);
return;
- Ostream &Str = Func->getContext()->getStrDump();
- Str << "push"
- << " ";
- dumpSources(Func);
+ case BinaryOutput:
+ Func->getAssembler<ARM32::AssemblerARM32>()->vpush(BaseReg, RegCount,
+ CondARM32::AL);
+ return;
+ }
}
void InstARM32Ret::emit(const Cfg *Func) const {
« src/IceInstARM32.h ('K') | « src/IceInstARM32.h ('k') | src/IceRegistersARM32.h » ('j') | src/IceRegistersARM32.h » ('J')

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