Refactor PUSH/POP in ARM assemblers.

src/IceRegistersARM32.h

 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 134 matching lines @@
       REGARM32_TABLE
 #undef X
   };
 
   static inline GPRRegister getEncodedGPR(int32_t RegNum) {
     assert(Reg_GPR_First <= RegNum);
     assert(RegNum <= Reg_GPR_Last);
     return GPRRegister(Table[RegNum].Encoding);
   }
 
+  static inline SizeT getNumGPRegs() {
+    return Reg_GPR_Last + 1 - Reg_GPR_First;
+  }
+
+  static inline IceString getGPRegName(SizeT RegNum) {

[John, 2016/01/06 16:10:21]

All throughout this file GPRs are named GPRs, not GPReg. I would like naming to
be consistent.

[Karl, 2016/01/06 23:21:58]

Done.

+    assert(RegNum <= getNumGPRegs());
+    return getRegName(Reg_GPR_First + RegNum);
+  }
+
   static inline GPRRegister getI64PairFirstGPRNum(int32_t RegNum) {
     assert(Reg_I64PAIR_First <= RegNum);
     assert(RegNum <= Reg_I64PAIR_Last);
     return GPRRegister(Table[RegNum].Encoding);
   }
 
   static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) {
     assert(Reg_I64PAIR_First <= RegNum);
     assert(RegNum <= Reg_I64PAIR_Last);
     return GPRRegister(Table[RegNum].Encoding + 1);
   }
 
   static inline bool isI64RegisterPair(int32_t RegNum) {
     return Table[RegNum].IsI64Pair;
   }
 
   static inline bool isEncodedSReg(int32_t RegNum) {
     return Table[RegNum].IsFP32;
   }
 
   static inline SizeT getNumSRegs() {
     return Reg_SREG_Last + 1 - Reg_SREG_First;
   }
 
+  static inline IceString getSRegName(SizeT RegNum) {
+    assert(RegNum <= getNumSRegs());
+    return getRegName(Reg_SREG_First + RegNum);
+  }
+
   static inline SRegister getEncodedSReg(int32_t RegNum) {
     assert(Reg_SREG_First <= RegNum);
     assert(RegNum <= Reg_SREG_Last);
     return SRegister(Table[RegNum].Encoding);
   }
 
   static inline DRegister getEncodedDReg(int32_t RegNum) {
     assert(Reg_DREG_First <= RegNum);
     assert(RegNum <= Reg_DREG_Last);
     return DRegister(Table[RegNum].Encoding);
@@ skipping 11 matching lines @@
   }
 };
 
 // Extend enum RegClass with ARM32-specific register classes (if any).
 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H