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Side by Side Diff: src/IceRegistersARM32.h

Issue 1535233002: Refactor PUSH/POP in ARM assemblers. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Remove "#if 0' Created 5 years ago
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1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
81 #undef X 81 #undef X
82 Encoded_Not_QReg = -1 82 Encoded_Not_QReg = -1
83 }; 83 };
84 84
85 static inline GPRRegister getEncodedGPR(int32_t RegNum) { 85 static inline GPRRegister getEncodedGPR(int32_t RegNum) {
86 assert(Reg_GPR_First <= RegNum); 86 assert(Reg_GPR_First <= RegNum);
87 assert(RegNum <= Reg_GPR_Last); 87 assert(RegNum <= Reg_GPR_Last);
88 return GPRRegister(RegNum - Reg_GPR_First); 88 return GPRRegister(RegNum - Reg_GPR_First);
89 } 89 }
90 90
91 static inline SizeT getNumGPRegs() {
92 return Reg_GPR_Last + 1 - Reg_GPR_First;
93 }
94
95 static inline const char *getGPRegName(SizeT RegNum) {
96 assert(RegNum <= getNumGPRegs());
97 return RegNames[Reg_GPR_First + RegNum];
98 }
99
91 static inline GPRRegister getI64PairFirstGPRNum(int32_t RegNum) { 100 static inline GPRRegister getI64PairFirstGPRNum(int32_t RegNum) {
92 assert(Reg_I64PAIR_First <= RegNum); 101 assert(Reg_I64PAIR_First <= RegNum);
93 assert(RegNum <= Reg_I64PAIR_Last); 102 assert(RegNum <= Reg_I64PAIR_Last);
94 return GPRRegister(2 * (RegNum - Reg_I64PAIR_First + Reg_GPR_First)); 103 return GPRRegister(2 * (RegNum - Reg_I64PAIR_First + Reg_GPR_First));
95 } 104 }
96 105
97 static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) { 106 static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) {
98 assert(Reg_I64PAIR_First <= RegNum); 107 assert(Reg_I64PAIR_First <= RegNum);
99 assert(RegNum <= Reg_I64PAIR_Last); 108 assert(RegNum <= Reg_I64PAIR_Last);
100 return GPRRegister(2 * (RegNum - Reg_I64PAIR_First + Reg_GPR_First) + 1); 109 return GPRRegister(2 * (RegNum - Reg_I64PAIR_First + Reg_GPR_First) + 1);
101 } 110 }
102 111
103 static inline bool isI64RegisterPair(int32_t RegNum) { 112 static inline bool isI64RegisterPair(int32_t RegNum) {
104 return Reg_I64PAIR_First <= RegNum && RegNum <= Reg_I64PAIR_Last; 113 return Reg_I64PAIR_First <= RegNum && RegNum <= Reg_I64PAIR_Last;
105 } 114 }
106 115
107 static inline bool isEncodedSReg(int32_t RegNum) { 116 static inline bool isEncodedSReg(int32_t RegNum) {
108 return Reg_SREG_First <= RegNum && RegNum <= Reg_SREG_Last; 117 return Reg_SREG_First <= RegNum && RegNum <= Reg_SREG_Last;
109 } 118 }
110 119
111 static inline SizeT getNumSRegs() { 120 static inline SizeT getNumSRegs() {
112 return Reg_SREG_Last + 1 - Reg_SREG_First; 121 return Reg_SREG_Last + 1 - Reg_SREG_First;
113 } 122 }
114 123
124 static inline const char *getSRegName(SizeT RegNum) {
125 assert(RegNum <= getNumSRegs());
126 return RegNames[Reg_SREG_First + RegNum];
127 }
128
115 static inline SRegister getEncodedSReg(int32_t RegNum) { 129 static inline SRegister getEncodedSReg(int32_t RegNum) {
116 assert(Reg_SREG_First <= RegNum); 130 assert(Reg_SREG_First <= RegNum);
117 assert(RegNum <= Reg_SREG_Last); 131 assert(RegNum <= Reg_SREG_Last);
118 return SRegister(RegNum - Reg_SREG_First); 132 return SRegister(RegNum - Reg_SREG_First);
119 } 133 }
120 134
121 static inline DRegister getEncodedDReg(int32_t RegNum) { 135 static inline DRegister getEncodedDReg(int32_t RegNum) {
122 assert(Reg_DREG_First <= RegNum); 136 assert(Reg_DREG_First <= RegNum);
123 assert(RegNum <= Reg_DREG_Last); 137 assert(RegNum <= Reg_DREG_Last);
124 return DRegister(RegNum - Reg_DREG_First); 138 return DRegister(RegNum - Reg_DREG_First);
125 } 139 }
126 140
127 static inline QRegister getEncodedQReg(int32_t RegNum) { 141 static inline QRegister getEncodedQReg(int32_t RegNum) {
128 assert(Reg_QREG_First <= RegNum); 142 assert(Reg_QREG_First <= RegNum);
129 assert(RegNum <= Reg_QREG_Last); 143 assert(RegNum <= Reg_QREG_Last);
130 return QRegister(RegNum - Reg_QREG_First); 144 return QRegister(RegNum - Reg_QREG_First);
131 } 145 }
132 146
133 static const char *RegNames[]; 147 static const char *RegNames[];
134 }; 148 };
135 149
136 // Extend enum RegClass with ARM32-specific register classes (if any). 150 // Extend enum RegClass with ARM32-specific register classes (if any).
137 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target }; 151 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target };
138 152
139 } // end of namespace Ice 153 } // end of namespace Ice
140 154
141 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H 155 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H
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