MIPS64: r6 compact branch optimization.

src/compiler/mips64/code-generator-mips64.cc

Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
index a8a9457cf4eb89cd1355186b662cca61f70d67d4..c317fd2c445dd2d461597198c2fac93f43322e09 100644
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -1646,9 +1646,7 @@ void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
   __ Branch(GetLabel(i.InputRpo(1)), hs, input, Operand(case_count));
   __ BlockTrampolinePoolFor(static_cast<int>(case_count) * 2 + 7);
   // Ensure that dd-ed labels use 8 byte aligned addresses.
-  if ((masm()->pc_offset() & 7) != 0) {
-    __ nop();
-  }
+  __ Align(8);
   __ bal(&here);
   __ dsll(at, input, 3);  // Branch delay slot.
   __ bind(&here);