MIPS64: r6 compact branch optimization.

test/cctest/test-macro-assembler-mips64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 222 matching lines @@
   MacroAssembler* masm = &assembler;
 
   const int kNumCases = 512;
   int values[kNumCases];
   isolate->random_number_generator()->NextBytes(values, sizeof(values));
   Label labels[kNumCases];
   Label near_start, end;
 
   __ daddiu(sp, sp, -8);
   __ sd(ra, MemOperand(sp));
-  if ((masm->pc_offset() & 7) == 0) {
-    __ nop();
-  }
 
   __ mov(v0, zero_reg);
 
   __ Branch(&end);
   __ bind(&near_start);
 
   // Generate slightly less than 32K instructions, which will soon require
   // trampoline for branch distance fixup.
   for (int i = 0; i < 32768 - 256; ++i) {
     __ addiu(v0, v0, 1);
   }
 
+  __ Align(8);
   Label done;
   {
     __ BlockTrampolinePoolFor(kNumCases * 2 + 6);
     PredictableCodeSizeScope predictable(
         masm, (kNumCases * 2 + 6) * Assembler::kInstrSize);
     Label here;
 
     __ bal(&here);
     __ dsll(at, a0, 3);  // In delay slot.
     __ bind(&here);
@@ skipping 197 matching lines @@
   for (size_t i = 0; i < nr_test_cases; ++i) {
     uint64_t res = run_dlsa(tc[i].rt, tc[i].rs, tc[i].sa);
     PrintF("0x%" PRIx64 " =? 0x%" PRIx64 " == Dlsa(v0, %" PRIx64 ", %" PRIx64
            ", %hhu)\n",
            tc[i].expected_res, res, tc[i].rt, tc[i].rs, tc[i].sa);
     CHECK_EQ(tc[i].expected_res, res);
   }
 }
 
 #undef __