Index: src/compiler/arm64/code-generator-arm64.cc |
diff --git a/src/compiler/arm64/code-generator-arm64.cc b/src/compiler/arm64/code-generator-arm64.cc |
index e22c3441f38f5048a74b7b212ce666cc997b1bfe..d71488c03e2657bee64dabec976835f82ea7f716 100644 |
--- a/src/compiler/arm64/code-generator-arm64.cc |
+++ b/src/compiler/arm64/code-generator-arm64.cc |
@@ -1060,7 +1060,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
case kArm64Float32ToUint64: |
__ Fcvtzu(i.OutputRegister64(), i.InputFloat32Register(0)); |
if (i.OutputCount() > 1) { |
- __ Fcmp(i.InputFloat32Register(0), 0.0); |
+ __ Fcmp(i.InputFloat32Register(0), -1.0); |
jbramley
2015/12/16 12:49:37
Is -1.0 supposed to be inclusive? If not, "ge" nee
ahaas
2015/12/16 16:15:25
done. I added a test for this case too.
|
__ Ccmp(i.OutputRegister(0), -1, ZFlag, ge); |
__ Cset(i.OutputRegister(1), ne); |
} |
@@ -1068,7 +1068,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
case kArm64Float64ToUint64: |
__ Fcvtzu(i.OutputRegister64(), i.InputDoubleRegister(0)); |
if (i.OutputCount() > 1) { |
- __ Fcmp(i.InputDoubleRegister(0), 0.0); |
+ __ Fcmp(i.InputDoubleRegister(0), -1.0); |
__ Ccmp(i.OutputRegister(0), -1, ZFlag, ge); |
__ Cset(i.OutputRegister(1), ne); |
} |