Add VPUSH/VPOP instructions to the ARM32 integrated assembler.

src/IceRegistersARM32.h

 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 86 matching lines @@
   static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) {
     assert(Reg_I64PAIR_First <= RegNum);
     assert(RegNum <= Reg_I64PAIR_Last);
     return GPRRegister(2 * (RegNum - Reg_I64PAIR_First + Reg_GPR_First) + 1);
   }
 
   static inline bool isI64RegisterPair(int32_t RegNum) {
     return Reg_I64PAIR_First <= RegNum && RegNum <= Reg_I64PAIR_Last;
   }
 
+  static inline bool isEncodedSReg(int32_t RegNum) {
+    return Reg_SREG_First <= RegNum && RegNum <= Reg_SREG_Last;
+  }
+
+  static inline SizeT getNumSRegs() {
+    return Reg_SREG_Last + 1 - Reg_SREG_First;
+  }
+
   static inline SRegister getEncodedSReg(int32_t RegNum) {
     assert(Reg_SREG_First <= RegNum);
     assert(RegNum <= Reg_SREG_Last);
     return SRegister(RegNum - Reg_SREG_First);
   }
 
   static inline DRegister getEncodedDReg(int32_t RegNum) {
     assert(Reg_DREG_First <= RegNum);
     assert(RegNum <= Reg_DREG_Last);
     return DRegister(RegNum - Reg_DREG_First);
   }
 
   static inline QRegister getEncodedQReg(int32_t RegNum) {
     assert(Reg_QREG_First <= RegNum);
     assert(RegNum <= Reg_QREG_Last);
     return QRegister(RegNum - Reg_QREG_First);
   }
 
   static const char *RegNames[];
 };
 
 // Extend enum RegClass with ARM32-specific register classes (if any).
 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H