| Index: src/IceTargetLoweringX8632.cpp
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| diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
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| index 8e78228d709a248537a9426bbd56c325069e8896..4a64b4a9f0a9649cb7f8b1eeba9f6f29f77e1694 100644
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| --- a/src/IceTargetLoweringX8632.cpp
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| +++ b/src/IceTargetLoweringX8632.cpp
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| @@ -219,16 +219,17 @@ void TargetX8632::lowerCall(const InstCall *Instr) {
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|    Variable *ReturnReg = nullptr;
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|    Variable *ReturnRegHi = nullptr;
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|    if (Dest) {
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| -    switch (Dest->getType()) {
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| +    const Type DestTy = Dest->getType();
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| +    switch (DestTy) {
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|      case IceType_NUM:
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|      case IceType_void:
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| -      llvm::report_fatal_error("Invalid Call dest type");
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| -      break;
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|      case IceType_i1:
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|      case IceType_i8:
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|      case IceType_i16:
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| +      llvm::report_fatal_error("Invalid Call dest type");
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| +      break;
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|      case IceType_i32:
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| -      ReturnReg = makeReg(Dest->getType(), Traits::RegisterSet::Reg_eax);
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| +      ReturnReg = makeReg(DestTy, Traits::RegisterSet::Reg_eax);
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|        break;
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|      case IceType_i64:
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|        ReturnReg = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
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| @@ -246,7 +247,7 @@ void TargetX8632::lowerCall(const InstCall *Instr) {
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|      case IceType_v8i16:
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|      case IceType_v4i32:
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|      case IceType_v4f32:
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| -      ReturnReg = makeReg(Dest->getType(), Traits::RegisterSet::Reg_xmm0);
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| +      ReturnReg = makeReg(DestTy, Traits::RegisterSet::Reg_xmm0);
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|        break;
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|      }
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|    }
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| @@ -303,10 +304,11 @@ void TargetX8632::lowerCall(const InstCall *Instr) {
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|        _mov(DestLo, ReturnReg);
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|        _mov(DestHi, ReturnRegHi);
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|      } else {
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| -      assert(Dest->getType() == IceType_i32 || Dest->getType() == IceType_i16 ||
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| -             Dest->getType() == IceType_i8 || Dest->getType() == IceType_i1 ||
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| -             isVectorType(Dest->getType()));
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| -      if (isVectorType(Dest->getType())) {
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| +      const Type DestTy = Dest->getType();
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| +      assert(DestTy == IceType_i32 || DestTy == IceType_i16 ||
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| +             DestTy == IceType_i8 || DestTy == IceType_i1 ||
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| +             isVectorType(DestTy));
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| +      if (isVectorType(DestTy)) {
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|          _movp(Dest, ReturnReg);
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|        } else {
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|          _mov(Dest, ReturnReg);
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| @@ -352,19 +354,21 @@ void TargetX8632::lowerRet(const InstRet *Inst) {
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|    Variable *Reg = nullptr;
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|    if (Inst->hasRetValue()) {
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|      Operand *Src0 = legalize(Inst->getRetValue());
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| +    const Type Src0Ty = Src0->getType();
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|      // TODO(jpp): this is not needed.
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| -    if (Src0->getType() == IceType_i64) {
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| +    if (Src0Ty == IceType_i64) {
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|        Variable *eax =
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|            legalizeToReg(loOperand(Src0), Traits::RegisterSet::Reg_eax);
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|        Variable *edx =
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|            legalizeToReg(hiOperand(Src0), Traits::RegisterSet::Reg_edx);
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|        Reg = eax;
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|        Context.insert<InstFakeUse>(edx);
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| -    } else if (isScalarFloatingType(Src0->getType())) {
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| +    } else if (isScalarFloatingType(Src0Ty)) {
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|        _fld(Src0);
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| -    } else if (isVectorType(Src0->getType())) {
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| +    } else if (isVectorType(Src0Ty)) {
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|        Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0);
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|      } else {
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| +      assert(Src0Ty == IceType_i32);
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|        _mov(Reg, Src0, Traits::RegisterSet::Reg_eax);
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|      }
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|    }
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| 
 |