Add option to force filetype=asm for testing

tests_lit/llvm2ice_tests/square.ll

 ; Test the a=b*b lowering sequence which can use a single temporary register
 ; instead of two registers.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 -mattr=sse4.1 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -Om1 -mattr=sse4.1 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
@@ skipping 15 matching lines @@
 ; CHECK: mulsd [[REG:xmm.]],[[REG]]
 
 define internal i32 @Square_i32(i32 %a) {
 entry:
   %result = mul i32 %a, %a
   ret i32 %result
 }
 ; CHECK-LABEL: Square_i32
 ; CHECK: imul [[REG:e..]],[[REG]]
 
-define internal i16 @Square_i16(i16 %a) {
+define internal i32 @Square_i16(i32 %a) {
 entry:
-  %result = mul i16 %a, %a
-  ret i16 %result
+  %a.16 = trunc i32 %a to i16
+  %result = mul i16 %a.16, %a.16
+  %result.i32 = sext i16 %result to i32
+  ret i32 %result.i32
 }
 ; CHECK-LABEL: Square_i16
 ; CHECK: imul [[REG:..]],[[REG]]
 
-define internal i8 @Square_i8(i8 %a) {
+define internal i32 @Square_i8(i32 %a) {
 entry:
-  %result = mul i8 %a, %a
-  ret i8 %result
+  %a.8 = trunc i32 %a to i8
+  %result = mul i8 %a.8, %a.8
+  %result.i32 = sext i8 %result to i32
+  ret i32 %result.i32
 }
 ; CHECK-LABEL: Square_i8
 ; CHECK: imul al
 
 define internal <4 x float> @Square_v4f32(<4 x float> %a) {
 entry:
   %result = fmul <4 x float> %a, %a
   ret <4 x float> %result
 }
 ; CHECK-LABEL: Square_v4f32
@@ skipping 15 matching lines @@
 ; CHECK-LABEL: Square_v8i16
 ; CHECK: pmullw [[REG:xmm.]],[[REG]]
 
 define internal <16 x i8> @Square_v16i8(<16 x i8> %a) {
 entry:
   %result = mul <16 x i8> %a, %a
   ret <16 x i8> %result
 }
 ; CHECK-LABEL: Square_v16i8
 ; CHECK-NOT: pmul