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Issue 1531623007: Add option to force filetype=asm for testing (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix merge ordering issue. Created 4 years, 11 months ago
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1 ; Tests various aspects of i1 related lowering. 1 ; Tests various aspects of i1 related lowering.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 \ 4 ; RUN: --target x8632 -i %s --args -O2 \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
8 ; RUN: --target x8632 -i %s --args -Om1 \ 8 ; RUN: --target x8632 -i %s --args -Om1 \
9 ; RUN: | %if --need=target_X8632 --command FileCheck %s 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s
10 10
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162 entry: 162 entry:
163 %arg_i1 = trunc i32 %arg to i1 163 %arg_i1 = trunc i32 %arg to i1
164 %result_i16 = sext i1 %arg_i1 to i16 164 %result_i16 = sext i1 %arg_i1 to i16
165 %result = sext i16 %result_i16 to i32 165 %result = sext i16 %result_i16 to i32
166 ret i32 %result 166 ret i32 %result
167 } 167 }
168 ; CHECK-LABEL: testSextI16 168 ; CHECK-LABEL: testSextI16
169 ; match the trunc instruction 169 ; match the trunc instruction
170 ; CHECK: and {{.*}},0x1 170 ; CHECK: and {{.*}},0x1
171 ; match the sext i1 instruction 171 ; match the sext i1 instruction
172 ; CHECK: movzx e[[REG:.*]],{{[a-d]l|BYTE PTR}} 172 ; CHECK: movzx {{e*}}[[REG:.*]],{{[a-d]l|BYTE PTR}}
173 ; CHECK-NEXT: shl [[REG]],0xf 173 ; CHECK-NEXT: shl [[REG]],0xf
174 ; CHECK-NEXT: sar [[REG]],0xf 174 ; CHECK-NEXT: sar [[REG]],0xf
175 175
176 ; ARM32-LABEL: testSextI16 176 ; ARM32-LABEL: testSextI16
177 ; ARM32: mov {{.*}}, #0 177 ; ARM32: mov {{.*}}, #0
178 ; ARM32: tst {{.*}}, #1 178 ; ARM32: tst {{.*}}, #1
179 ; ARM32: mvn {{.*}}, #0 179 ; ARM32: mvn {{.*}}, #0
180 ; ARM32: movne 180 ; ARM32: movne
181 ; ARM32: sxth 181 ; ARM32: sxth
182 182
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272 %arg_i1 = fptosi double %arg to i1 272 %arg_i1 = fptosi double %arg to i1
273 %result = sext i1 %arg_i1 to i32 273 %result = sext i1 %arg_i1 to i32
274 ret i32 %result 274 ret i32 %result
275 } 275 }
276 ; CHECK-LABEL: testFptosiDouble 276 ; CHECK-LABEL: testFptosiDouble
277 ; CHECK: cvttsd2si 277 ; CHECK: cvttsd2si
278 ; CHECK: and {{.*}},0x1 278 ; CHECK: and {{.*}},0x1
279 ; CHECK: movzx [[REG:.*]], 279 ; CHECK: movzx [[REG:.*]],
280 ; CHECK-NEXT: shl [[REG]],0x1f 280 ; CHECK-NEXT: shl [[REG]],0x1f
281 ; CHECK-NEXT: sar [[REG]],0x1f 281 ; CHECK-NEXT: sar [[REG]],0x1f
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