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| 1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 405 | 405 |
| 406 Args[i] = RegisterArg; | 406 Args[i] = RegisterArg; |
| 407 Context.insert<InstAssign>(Arg, RegisterArg); | 407 Context.insert<InstAssign>(Arg, RegisterArg); |
| 408 } | 408 } |
| 409 } | 409 } |
| 410 | 410 |
| 411 void TargetX8664::lowerRet(const InstRet *Inst) { | 411 void TargetX8664::lowerRet(const InstRet *Inst) { |
| 412 Variable *Reg = nullptr; | 412 Variable *Reg = nullptr; |
| 413 if (Inst->hasRetValue()) { | 413 if (Inst->hasRetValue()) { |
| 414 Operand *Src0 = legalize(Inst->getRetValue()); | 414 Operand *Src0 = legalize(Inst->getRetValue()); |
| 415 if (isVectorType(Src0->getType()) || | 415 const Type Src0Ty = Src0->getType(); |
| 416 isScalarFloatingType(Src0->getType())) { | 416 if (isVectorType(Src0Ty) || isScalarFloatingType(Src0Ty)) { |
| 417 Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0); | 417 Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0); |
| 418 } else { | 418 } else { |
| 419 assert(isScalarIntegerType(Src0->getType())); | 419 assert(isScalarIntegerType(Src0Ty)); |
| 420 _mov(Reg, Src0, Traits::getGprForType(Src0->getType(), | 420 _mov(Reg, Src0, |
| 421 Traits::RegisterSet::Reg_rax)); | 421 Traits::getGprForType(Src0Ty, Traits::RegisterSet::Reg_rax)); |
| 422 } | 422 } |
| 423 } | 423 } |
| 424 // Add a ret instruction even if sandboxing is enabled, because addEpilog | 424 // Add a ret instruction even if sandboxing is enabled, because addEpilog |
| 425 // explicitly looks for a ret instruction as a marker for where to insert the | 425 // explicitly looks for a ret instruction as a marker for where to insert the |
| 426 // frame removal instructions. | 426 // frame removal instructions. |
| 427 _ret(Reg); | 427 _ret(Reg); |
| 428 // Add a fake use of esp to make sure esp stays alive for the entire | 428 // Add a fake use of esp to make sure esp stays alive for the entire |
| 429 // function. Otherwise post-call esp adjustments get dead-code eliminated. | 429 // function. Otherwise post-call esp adjustments get dead-code eliminated. |
| 430 keepEspLiveAtExit(); | 430 keepEspLiveAtExit(); |
| 431 } | 431 } |
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| 1050 #define X(tag, sizeLog2, align, elts, elty, str) \ | 1050 #define X(tag, sizeLog2, align, elts, elty, str) \ |
| 1051 static_assert(_table1_##tag == _table2_##tag, \ | 1051 static_assert(_table1_##tag == _table2_##tag, \ |
| 1052 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); | 1052 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); |
| 1053 ICETYPE_TABLE | 1053 ICETYPE_TABLE |
| 1054 #undef X | 1054 #undef X |
| 1055 } // end of namespace dummy3 | 1055 } // end of namespace dummy3 |
| 1056 } // end of anonymous namespace | 1056 } // end of anonymous namespace |
| 1057 | 1057 |
| 1058 } // end of namespace X8664 | 1058 } // end of namespace X8664 |
| 1059 } // end of namespace Ice | 1059 } // end of namespace Ice |
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