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1 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=// | 1 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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357 assert(RegNum >= 0); | 357 assert(RegNum >= 0); |
358 assert(RegNum < RegisterSet::Reg_NUM); | 358 assert(RegNum < RegisterSet::Reg_NUM); |
359 return BaseRegs[RegNum]; | 359 return BaseRegs[RegNum]; |
360 } | 360 } |
361 | 361 |
362 // Return a register in RegNum's alias set that is suitable for Ty. | 362 // Return a register in RegNum's alias set that is suitable for Ty. |
363 static int32_t getGprForType(Type Ty, int32_t RegNum) { | 363 static int32_t getGprForType(Type Ty, int32_t RegNum) { |
364 assert(RegNum != Variable::NoRegister); | 364 assert(RegNum != Variable::NoRegister); |
365 // TODO(stichnot): Rewrite this as a table lookup from a table computed in a | 365 // TODO(stichnot): Rewrite this as a table lookup from a table computed in a |
366 // TargetLowering static initializer. | 366 // TargetLowering static initializer. |
367 // [abcd]h registers are not convertible to their ?l, ?x, and e?x versions. | |
368 switch (RegNum) { | |
369 default: | |
370 break; | |
371 case RegisterSet::Reg_ah: | |
372 case RegisterSet::Reg_bh: | |
373 case RegisterSet::Reg_ch: | |
374 case RegisterSet::Reg_dh: | |
375 assert(Ty == IceType_i8 || Ty == IceType_i1); | |
Jim Stichnoth
2016/01/10 03:08:56
assert(isByteSizedType(Ty));
(looks like there ar
sehr
2016/01/11 21:49:48
Done.
| |
376 return RegNum; | |
377 } | |
367 RegNum = getBaseReg(RegNum); | 378 RegNum = getBaseReg(RegNum); |
368 if (Ty == IceType_i8 || Ty == IceType_i1) { | 379 if (Ty == IceType_i8 || Ty == IceType_i1) { |
369 switch (RegNum) { | 380 switch (RegNum) { |
370 default: | 381 default: |
371 assert(0); | 382 assert(0); |
372 case RegisterSet::Reg_eax: | 383 case RegisterSet::Reg_eax: |
373 return RegisterSet::Reg_al; | 384 return RegisterSet::Reg_al; |
374 case RegisterSet::Reg_ecx: | 385 case RegisterSet::Reg_ecx: |
375 return RegisterSet::Reg_cl; | 386 return RegisterSet::Reg_cl; |
376 case RegisterSet::Reg_edx: | 387 case RegisterSet::Reg_edx: |
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940 | 951 |
941 static uint8_t InstSegmentPrefixes[]; | 952 static uint8_t InstSegmentPrefixes[]; |
942 }; | 953 }; |
943 | 954 |
944 using Traits = ::Ice::X8632::TargetX8632Traits; | 955 using Traits = ::Ice::X8632::TargetX8632Traits; |
945 } // end of namespace X8632 | 956 } // end of namespace X8632 |
946 | 957 |
947 } // end of namespace Ice | 958 } // end of namespace Ice |
948 | 959 |
949 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H | 960 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H |
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