Fix regression in SSE instruction opcodes

src/IceInstX86Base.h

 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 3056 matching lines @@
   template <> const char *InstX86Movzx<Machine>::Base::Opcode = "movz";        \
   template <> const char *InstX86Sqrtss<Machine>::Base::Opcode = "sqrtss";     \
   template <> const char *InstX86Cbwdq<Machine>::Base::Opcode = "cbw/cwd/cdq"; \
   /* Mov-like ops */                                                           \
   template <> const char *InstX86Mov<Machine>::Base::Opcode = "mov";           \
   template <> const char *InstX86Movp<Machine>::Base::Opcode = "movups";       \
   template <> const char *InstX86Movq<Machine>::Base::Opcode = "movq";         \
   /* Binary ops */                                                             \
   template <> const char *InstX86Add<Machine>::Base::Opcode = "add";           \
   template <> const char *InstX86AddRMW<Machine>::Base::Opcode = "add";        \
-  template <> const char *InstX86Addps<Machine>::Base::Opcode = "addps";       \

[John, 2015/12/18 00:50:03]

It saddens me that the Instruction is named Addps, but its opcode is "add"

[sehr, 2015/12/18 00:52:12]

We need a new name for the class (probably with XMM or SSE in it).  And it needs
to be distinct from Addss and Add...  Taxonomies -- hard work.

+  template <> const char *InstX86Addps<Machine>::Base::Opcode = "add";         \
   template <> const char *InstX86Adc<Machine>::Base::Opcode = "adc";           \
   template <> const char *InstX86AdcRMW<Machine>::Base::Opcode = "adc";        \
-  template <> const char *InstX86Addss<Machine>::Base::Opcode = "addss";       \
+  template <> const char *InstX86Addss<Machine>::Base::Opcode = "add";         \
   template <> const char *InstX86Andnps<Machine>::Base::Opcode = "andn";       \
   template <> const char *InstX86Andps<Machine>::Base::Opcode = "and";         \
   template <> const char *InstX86Maxss<Machine>::Base::Opcode = "max";         \
   template <> const char *InstX86Minss<Machine>::Base::Opcode = "min";         \
   template <> const char *InstX86Padd<Machine>::Base::Opcode = "padd";         \
   template <> const char *InstX86Sub<Machine>::Base::Opcode = "sub";           \
   template <> const char *InstX86SubRMW<Machine>::Base::Opcode = "sub";        \
-  template <> const char *InstX86Subps<Machine>::Base::Opcode = "subps";       \
-  template <> const char *InstX86Subss<Machine>::Base::Opcode = "subss";       \
+  template <> const char *InstX86Subps<Machine>::Base::Opcode = "sub";         \
+  template <> const char *InstX86Subss<Machine>::Base::Opcode = "sub";         \
   template <> const char *InstX86Sbb<Machine>::Base::Opcode = "sbb";           \
   template <> const char *InstX86SbbRMW<Machine>::Base::Opcode = "sbb";        \
   template <> const char *InstX86Psub<Machine>::Base::Opcode = "psub";         \
   template <> const char *InstX86And<Machine>::Base::Opcode = "and";           \
   template <> const char *InstX86AndRMW<Machine>::Base::Opcode = "and";        \
   template <> const char *InstX86Pand<Machine>::Base::Opcode = "pand";         \
   template <> const char *InstX86Pandn<Machine>::Base::Opcode = "pandn";       \
   template <> const char *InstX86Or<Machine>::Base::Opcode = "or";             \
   template <> const char *InstX86Orps<Machine>::Base::Opcode = "or";           \
   template <> const char *InstX86OrRMW<Machine>::Base::Opcode = "or";          \
   template <> const char *InstX86Por<Machine>::Base::Opcode = "por";           \
   template <> const char *InstX86Xor<Machine>::Base::Opcode = "xor";           \
   template <> const char *InstX86Xorps<Machine>::Base::Opcode = "xor";         \
   template <> const char *InstX86XorRMW<Machine>::Base::Opcode = "xor";        \
   template <> const char *InstX86Pxor<Machine>::Base::Opcode = "pxor";         \
   template <> const char *InstX86Imul<Machine>::Base::Opcode = "imul";         \
   template <> const char *InstX86ImulImm<Machine>::Base::Opcode = "imul";      \
-  template <> const char *InstX86Mulps<Machine>::Base::Opcode = "mulps";       \
-  template <> const char *InstX86Mulss<Machine>::Base::Opcode = "mulss";       \
+  template <> const char *InstX86Mulps<Machine>::Base::Opcode = "mul";         \
+  template <> const char *InstX86Mulss<Machine>::Base::Opcode = "mul";         \
   template <> const char *InstX86Pmull<Machine>::Base::Opcode = "pmull";       \
   template <> const char *InstX86Pmuludq<Machine>::Base::Opcode = "pmuludq";   \
   template <> const char *InstX86Div<Machine>::Base::Opcode = "div";           \
-  template <> const char *InstX86Divps<Machine>::Base::Opcode = "divps";       \
-  template <> const char *InstX86Divss<Machine>::Base::Opcode = "divss";       \
+  template <> const char *InstX86Divps<Machine>::Base::Opcode = "div";         \
+  template <> const char *InstX86Divss<Machine>::Base::Opcode = "div";         \
   template <> const char *InstX86Idiv<Machine>::Base::Opcode = "idiv";         \
   template <> const char *InstX86Rol<Machine>::Base::Opcode = "rol";           \
   template <> const char *InstX86Shl<Machine>::Base::Opcode = "shl";           \
   template <> const char *InstX86Psll<Machine>::Base::Opcode = "psll";         \
   template <> const char *InstX86Shr<Machine>::Base::Opcode = "shr";           \
   template <> const char *InstX86Sar<Machine>::Base::Opcode = "sar";           \
   template <> const char *InstX86Psra<Machine>::Base::Opcode = "psra";         \
   template <> const char *InstX86Psrl<Machine>::Base::Opcode = "psrl";         \
   template <> const char *InstX86Pcmpeq<Machine>::Base::Opcode = "pcmpeq";     \
   template <> const char *InstX86Pcmpgt<Machine>::Base::Opcode = "pcmpgt";     \
@@ skipping 310 matching lines @@
           &InstX86Base<Machine>::Traits::Assembler::psrl};                     \
   }                                                                            \
   }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #include "IceInstX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICEINSTX86BASE_H