Chromium Code Reviews| OLD | NEW |
|---|---|
| 1 ; Show that we know how to translate rev (used in bswap). | 1 ; Show that we know how to translate add. |
|
Jim Stichnoth
2015/12/17 19:31:16
rbit
Karl
2015/12/18 15:41:25
Done.
| |
| 2 | 2 |
| 3 ; NOTE: We use -O2 to get rid of memory stores. | 3 ; NOTE: We use -O2 to get rid of memory stores. |
| 4 | 4 |
| 5 ; REQUIRES: allow_dump | 5 ; REQUIRES: allow_dump |
| 6 | 6 |
| 7 ; Compile using standalone assembler. | 7 ; Compile using standalone assembler. |
| 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ | 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ |
| 9 ; RUN: | FileCheck %s --check-prefix=ASM | 9 ; RUN: | FileCheck %s --check-prefix=ASM |
| 10 | 10 |
| 11 ; Show bytes in assembled standalone code. | 11 ; Show bytes in assembled standalone code. |
| 12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ | 12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ |
| 13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS | 13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS |
| 14 | 14 |
| 15 ; Compile using integrated assembler. | 15 ; Compile using integrated assembler. |
| 16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ | 16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ |
| 17 ; RUN: | FileCheck %s --check-prefix=IASM | 17 ; RUN: | FileCheck %s --check-prefix=IASM |
| 18 | 18 |
| 19 ; Show bytes in assembled integrated code. | 19 ; Show bytes in assembled integrated code. |
| 20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ | 20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ |
| 21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS | 21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS |
| 22 | 22 |
| 23 declare i16 @llvm.bswap.i16(i16) | 23 declare i32 @llvm.cttz.i32(i32, i1) |
| 24 | 24 |
| 25 define internal i32 @testRev(i32 %a) { | 25 define internal i32 @testRbit(i32 %a) { |
| 26 ; ASM-LABEL:testRev: | 26 ; ASM-LABEL: testRbit: |
| 27 ; DIS-LABEL:00000000 <testRev>: | 27 ; DIS-LABEL: 00000000 <testRbit>: |
| 28 ; IASM-LABEL:testRev: | 28 ; IASM-LABEL: testRbit: |
| 29 | 29 |
| 30 entry: | 30 entry: |
| 31 ; ASM-NEXT:.LtestRev$entry: | 31 ; ASM-NEXT: .LtestRbit$entry: |
| 32 ; IASM-NEXT:.LtestRev$entry: | 32 ; IASM-NEXT: .LtestRbit$entry: |
| 33 | 33 |
| 34 %a.arg_trunc = trunc i32 %a to i16 | 34 %x = call i32 @llvm.cttz.i32(i32 %a, i1 0) |
| 35 %v = tail call i16 @llvm.bswap.i16(i16 %a.arg_trunc) | |
| 36 | 35 |
| 37 ; ***** Example of rev instruction. ***** | 36 ; ASM-NEXT: rbit r0, r0 |
| 38 ; ASM-NEXT: rev r0, r0 | 37 ; DIS-NEXT: 0: e6ff0f30 |
| 39 ; DIS-NEXT: 0: e6bf0f30 | |
| 40 ; IASM-NEXT: .byte 0x30 | 38 ; IASM-NEXT: .byte 0x30 |
| 41 ; IASM-NEXT: .byte 0xf | 39 ; IASM-NEXT: .byte 0xf |
| 42 ; IASM-NEXT: .byte 0xbf | 40 ; IASM-NEXT: .byte 0xff |
| 43 ; IASM-NEXT: .byte 0xe6 | 41 ; IASM-NEXT: .byte 0xe6 |
| 44 | 42 |
| 45 ; ASM-NEXT: lsr r0, r0, #16 | 43 ret i32 %x |
| 46 | |
| 47 %.ret_ext = zext i16 %v to i32 | |
| 48 ret i32 %.ret_ext | |
| 49 } | 44 } |
| OLD | NEW |