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| 1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===// | 1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 28 matching lines...) Expand all Loading... |
| 39 using X86TargetLowering = typename Traits::TargetLowering; | 39 using X86TargetLowering = typename Traits::TargetLowering; |
| 40 | 40 |
| 41 enum InstKindX86 { | 41 enum InstKindX86 { |
| 42 k__Start = Inst::Target, | 42 k__Start = Inst::Target, |
| 43 Adc, | 43 Adc, |
| 44 AdcRMW, | 44 AdcRMW, |
| 45 Add, | 45 Add, |
| 46 AddRMW, | 46 AddRMW, |
| 47 Addps, | 47 Addps, |
| 48 Addss, | 48 Addss, |
| 49 Adjuststack, | |
| 50 And, | 49 And, |
| 51 Andnps, | 50 Andnps, |
| 52 Andps, | 51 Andps, |
| 53 AndRMW, | 52 AndRMW, |
| 54 Blendvps, | 53 Blendvps, |
| 55 Br, | 54 Br, |
| 56 Bsf, | 55 Bsf, |
| 57 Bsr, | 56 Bsr, |
| 58 Bswap, | 57 Bswap, |
| 59 Call, | 58 Call, |
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| 3365 &InstX86Base<Machine>::Traits::Assembler::psrl}; \ | 3364 &InstX86Base<Machine>::Traits::Assembler::psrl}; \ |
| 3366 } \ | 3365 } \ |
| 3367 } | 3366 } |
| 3368 | 3367 |
| 3369 } // end of namespace X86Internal | 3368 } // end of namespace X86Internal |
| 3370 } // end of namespace Ice | 3369 } // end of namespace Ice |
| 3371 | 3370 |
| 3372 #include "IceInstX86BaseImpl.h" | 3371 #include "IceInstX86BaseImpl.h" |
| 3373 | 3372 |
| 3374 #endif // SUBZERO_SRC_ICEINSTX86BASE_H | 3373 #endif // SUBZERO_SRC_ICEINSTX86BASE_H |
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