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1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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381 Variable *RegisterArg = Func->makeVariable(Ty); | 381 Variable *RegisterArg = Func->makeVariable(Ty); |
382 auto *RegisterArg64On32 = llvm::cast<Variable64On32>(RegisterArg); | 382 auto *RegisterArg64On32 = llvm::cast<Variable64On32>(RegisterArg); |
383 if (BuildDefs::dump()) | 383 if (BuildDefs::dump()) |
384 RegisterArg64On32->setName(Func, "home_reg:" + Arg->getName(Func)); | 384 RegisterArg64On32->setName(Func, "home_reg:" + Arg->getName(Func)); |
385 RegisterArg64On32->initHiLo(Func); | 385 RegisterArg64On32->initHiLo(Func); |
386 RegisterArg64On32->setIsArg(); | 386 RegisterArg64On32->setIsArg(); |
387 RegisterArg64On32->getLo()->setRegNum(RegLo); | 387 RegisterArg64On32->getLo()->setRegNum(RegLo); |
388 RegisterArg64On32->getHi()->setRegNum(RegHi); | 388 RegisterArg64On32->getHi()->setRegNum(RegHi); |
389 Arg->setIsArg(false); | 389 Arg->setIsArg(false); |
390 Args[I] = RegisterArg64On32; | 390 Args[I] = RegisterArg64On32; |
391 Context.insert(InstAssign::create(Func, Arg, RegisterArg)); | 391 Context.insert<InstAssign>(Arg, RegisterArg); |
392 continue; | 392 continue; |
393 } else { | 393 } else { |
394 assert(Ty == IceType_i32); | 394 assert(Ty == IceType_i32); |
395 if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG) | 395 if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG) |
396 continue; | 396 continue; |
397 int32_t RegNum = RegMIPS32::Reg_A0 + NumGPRRegsUsed; | 397 int32_t RegNum = RegMIPS32::Reg_A0 + NumGPRRegsUsed; |
398 ++NumGPRRegsUsed; | 398 ++NumGPRRegsUsed; |
399 Variable *RegisterArg = Func->makeVariable(Ty); | 399 Variable *RegisterArg = Func->makeVariable(Ty); |
400 if (BuildDefs::dump()) { | 400 if (BuildDefs::dump()) { |
401 RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func)); | 401 RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func)); |
402 } | 402 } |
403 RegisterArg->setRegNum(RegNum); | 403 RegisterArg->setRegNum(RegNum); |
404 RegisterArg->setIsArg(); | 404 RegisterArg->setIsArg(); |
405 Arg->setIsArg(false); | 405 Arg->setIsArg(false); |
406 Args[I] = RegisterArg; | 406 Args[I] = RegisterArg; |
407 Context.insert(InstAssign::create(Func, Arg, RegisterArg)); | 407 Context.insert<InstAssign>(Arg, RegisterArg); |
408 } | 408 } |
409 } | 409 } |
410 } | 410 } |
411 | 411 |
412 Type TargetMIPS32::stackSlotType() { return IceType_i32; } | 412 Type TargetMIPS32::stackSlotType() { return IceType_i32; } |
413 | 413 |
414 void TargetMIPS32::addProlog(CfgNode *Node) { | 414 void TargetMIPS32::addProlog(CfgNode *Node) { |
415 (void)Node; | 415 (void)Node; |
416 return; | 416 return; |
417 UnimplementedError(Func->getContext()->getFlags()); | 417 UnimplementedError(Func->getContext()->getFlags()); |
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526 } | 526 } |
527 | 527 |
528 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) { | 528 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) { |
529 Variable *Dest = Inst->getDest(); | 529 Variable *Dest = Inst->getDest(); |
530 Operand *Src0 = legalizeUndef(Inst->getSrc(0)); | 530 Operand *Src0 = legalizeUndef(Inst->getSrc(0)); |
531 Operand *Src1 = legalizeUndef(Inst->getSrc(1)); | 531 Operand *Src1 = legalizeUndef(Inst->getSrc(1)); |
532 if (Dest->getType() == IceType_i64) { | 532 if (Dest->getType() == IceType_i64) { |
533 // TODO(reed kotler): fakedef needed for now until all cases are implemented | 533 // TODO(reed kotler): fakedef needed for now until all cases are implemented |
534 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); | 534 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); |
535 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); | 535 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
536 Context.insert(InstFakeDef::create(Func, DestLo)); | 536 Context.insert<InstFakeDef>(DestLo); |
537 Context.insert(InstFakeDef::create(Func, DestHi)); | 537 Context.insert<InstFakeDef>(DestHi); |
538 UnimplementedError(Func->getContext()->getFlags()); | 538 UnimplementedError(Func->getContext()->getFlags()); |
539 return; | 539 return; |
540 } | 540 } |
541 if (isVectorType(Dest->getType())) { | 541 if (isVectorType(Dest->getType())) { |
542 Context.insert(InstFakeDef::create(Func, Dest)); | 542 Context.insert<InstFakeDef>(Dest); |
543 UnimplementedError(Func->getContext()->getFlags()); | 543 UnimplementedError(Func->getContext()->getFlags()); |
544 return; | 544 return; |
545 } | 545 } |
546 // Dest->getType() is non-i64 scalar | 546 // Dest->getType() is non-i64 scalar |
547 Variable *T = makeReg(Dest->getType()); | 547 Variable *T = makeReg(Dest->getType()); |
548 Variable *Src0R = legalizeToReg(Src0); | 548 Variable *Src0R = legalizeToReg(Src0); |
549 Variable *Src1R = legalizeToReg(Src1); | 549 Variable *Src1R = legalizeToReg(Src1); |
550 switch (Inst->getOp()) { | 550 switch (Inst->getOp()) { |
551 case InstArithmetic::_num: | 551 case InstArithmetic::_num: |
552 break; | 552 break; |
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595 break; | 595 break; |
596 case InstArithmetic::Fmul: | 596 case InstArithmetic::Fmul: |
597 break; | 597 break; |
598 case InstArithmetic::Fdiv: | 598 case InstArithmetic::Fdiv: |
599 break; | 599 break; |
600 case InstArithmetic::Frem: | 600 case InstArithmetic::Frem: |
601 break; | 601 break; |
602 } | 602 } |
603 // TODO(reed kotler): | 603 // TODO(reed kotler): |
604 // fakedef and fakeuse needed for now until all cases are implemented | 604 // fakedef and fakeuse needed for now until all cases are implemented |
605 Context.insert(InstFakeUse::create(Func, Src0R)); | 605 Context.insert<InstFakeUse>(Src0R); |
606 Context.insert(InstFakeUse::create(Func, Src1R)); | 606 Context.insert<InstFakeUse>(Src1R); |
607 Context.insert(InstFakeDef::create(Func, Dest)); | 607 Context.insert<InstFakeDef>(Dest); |
608 UnimplementedError(Func->getContext()->getFlags()); | 608 UnimplementedError(Func->getContext()->getFlags()); |
609 } | 609 } |
610 | 610 |
611 void TargetMIPS32::lowerAssign(const InstAssign *Inst) { | 611 void TargetMIPS32::lowerAssign(const InstAssign *Inst) { |
612 Variable *Dest = Inst->getDest(); | 612 Variable *Dest = Inst->getDest(); |
613 Operand *Src0 = Inst->getSrc(0); | 613 Operand *Src0 = Inst->getSrc(0); |
614 assert(Dest->getType() == Src0->getType()); | 614 assert(Dest->getType() == Src0->getType()); |
615 if (Dest->getType() == IceType_i64) { | 615 if (Dest->getType() == IceType_i64) { |
616 Src0 = legalizeUndef(Src0); | 616 Src0 = legalizeUndef(Src0); |
617 Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg); | 617 Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg); |
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881 Operand *Src0F = legalize(Src0, Legal_Reg); | 881 Operand *Src0F = legalize(Src0, Legal_Reg); |
882 Reg = makeReg(Src0F->getType(), RegMIPS32::Reg_V0); | 882 Reg = makeReg(Src0F->getType(), RegMIPS32::Reg_V0); |
883 _mov(Reg, Src0F); | 883 _mov(Reg, Src0F); |
884 break; | 884 break; |
885 } | 885 } |
886 case IceType_i64: { | 886 case IceType_i64: { |
887 Src0 = legalizeUndef(Src0); | 887 Src0 = legalizeUndef(Src0); |
888 Variable *R0 = legalizeToReg(loOperand(Src0), RegMIPS32::Reg_V0); | 888 Variable *R0 = legalizeToReg(loOperand(Src0), RegMIPS32::Reg_V0); |
889 Variable *R1 = legalizeToReg(hiOperand(Src0), RegMIPS32::Reg_V1); | 889 Variable *R1 = legalizeToReg(hiOperand(Src0), RegMIPS32::Reg_V1); |
890 Reg = R0; | 890 Reg = R0; |
891 Context.insert(InstFakeUse::create(Func, R1)); | 891 Context.insert<InstFakeUse>(R1); |
892 break; | 892 break; |
893 } | 893 } |
894 | 894 |
895 default: | 895 default: |
896 UnimplementedError(Func->getContext()->getFlags()); | 896 UnimplementedError(Func->getContext()->getFlags()); |
897 } | 897 } |
898 } | 898 } |
899 _ret(getPhysicalRegister(RegMIPS32::Reg_RA), Reg); | 899 _ret(getPhysicalRegister(RegMIPS32::Reg_RA), Reg); |
900 } | 900 } |
901 | 901 |
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1015 assert(Allowed & Legal_Reg); | 1015 assert(Allowed & Legal_Reg); |
1016 // Go through the various types of operands: | 1016 // Go through the various types of operands: |
1017 // OperandMIPS32Mem, Constant, and Variable. | 1017 // OperandMIPS32Mem, Constant, and Variable. |
1018 // Given the above assertion, if type of operand is not legal | 1018 // Given the above assertion, if type of operand is not legal |
1019 // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy | 1019 // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy |
1020 // to a register. | 1020 // to a register. |
1021 if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) { | 1021 if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) { |
1022 (void)C; | 1022 (void)C; |
1023 // TODO(reed kotler): complete this case for proper implementation | 1023 // TODO(reed kotler): complete this case for proper implementation |
1024 Variable *Reg = makeReg(Ty, RegNum); | 1024 Variable *Reg = makeReg(Ty, RegNum); |
1025 Context.insert(InstFakeDef::create(Func, Reg)); | 1025 Context.insert<InstFakeDef>(Reg); |
1026 return Reg; | 1026 return Reg; |
1027 } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) { | 1027 } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) { |
1028 uint32_t Value = static_cast<uint32_t>(C32->getValue()); | 1028 uint32_t Value = static_cast<uint32_t>(C32->getValue()); |
1029 // Check if the immediate will fit in a Flexible second operand, | 1029 // Check if the immediate will fit in a Flexible second operand, |
1030 // if a Flexible second operand is allowed. We need to know the exact | 1030 // if a Flexible second operand is allowed. We need to know the exact |
1031 // value, so that rules out relocatable constants. | 1031 // value, so that rules out relocatable constants. |
1032 // Also try the inverse and use MVN if possible. | 1032 // Also try the inverse and use MVN if possible. |
1033 // Do a movw/movt to a register. | 1033 // Do a movw/movt to a register. |
1034 Variable *Reg; | 1034 Variable *Reg; |
1035 if (RegNum == Variable::NoRegister) | 1035 if (RegNum == Variable::NoRegister) |
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1076 << "nomicromips\n"; | 1076 << "nomicromips\n"; |
1077 Str << "\t.set\t" | 1077 Str << "\t.set\t" |
1078 << "nomips16\n"; | 1078 << "nomips16\n"; |
1079 } | 1079 } |
1080 | 1080 |
1081 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; | 1081 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; |
1082 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 1082 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
1083 llvm::SmallBitVector TargetMIPS32::ScratchRegs; | 1083 llvm::SmallBitVector TargetMIPS32::ScratchRegs; |
1084 | 1084 |
1085 } // end of namespace Ice | 1085 } // end of namespace Ice |
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