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Side by Side Diff: src/IceTargetLoweringARM32.h

Issue 1527143003: Subzero. Introduces a new LoweringContext::insert() method. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: More changes Created 5 years ago
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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 259 matching lines...) Expand 10 before | Expand all | Expand 10 after
270 void lowerIDivRem(Variable *Dest, Variable *T, Variable *Src0R, Operand *Src1, 270 void lowerIDivRem(Variable *Dest, Variable *T, Variable *Src0R, Operand *Src1,
271 ExtInstr ExtFunc, DivInstr DivFunc, bool IsRemainder); 271 ExtInstr ExtFunc, DivInstr DivFunc, bool IsRemainder);
272 272
273 void lowerCLZ(Variable *Dest, Variable *ValLo, Variable *ValHi); 273 void lowerCLZ(Variable *Dest, Variable *ValLo, Variable *ValHi);
274 274
275 // The following are helpers that insert lowered ARM32 instructions with 275 // The following are helpers that insert lowered ARM32 instructions with
276 // minimal syntactic overhead, so that the lowering code can look as close to 276 // minimal syntactic overhead, so that the lowering code can look as close to
277 // assembly as practical. 277 // assembly as practical.
278 void _add(Variable *Dest, Variable *Src0, Operand *Src1, 278 void _add(Variable *Dest, Variable *Src0, Operand *Src1,
279 CondARM32::Cond Pred = CondARM32::AL) { 279 CondARM32::Cond Pred = CondARM32::AL) {
280 Context.insert(InstARM32Add::create(Func, Dest, Src0, Src1, Pred)); 280 Context.insert<InstARM32Add>(Dest, Src0, Src1, Pred);
281 } 281 }
282 void _adds(Variable *Dest, Variable *Src0, Operand *Src1, 282 void _adds(Variable *Dest, Variable *Src0, Operand *Src1,
283 CondARM32::Cond Pred = CondARM32::AL) { 283 CondARM32::Cond Pred = CondARM32::AL) {
284 constexpr bool SetFlags = true; 284 constexpr bool SetFlags = true;
285 Context.insert( 285 Context.insert<InstARM32Add>(Dest, Src0, Src1, Pred, SetFlags);
286 InstARM32Add::create(Func, Dest, Src0, Src1, Pred, SetFlags));
287 } 286 }
288 void _adc(Variable *Dest, Variable *Src0, Operand *Src1, 287 void _adc(Variable *Dest, Variable *Src0, Operand *Src1,
289 CondARM32::Cond Pred = CondARM32::AL) { 288 CondARM32::Cond Pred = CondARM32::AL) {
290 Context.insert(InstARM32Adc::create(Func, Dest, Src0, Src1, Pred)); 289 Context.insert<InstARM32Adc>(Dest, Src0, Src1, Pred);
291 } 290 }
292 void _and(Variable *Dest, Variable *Src0, Operand *Src1, 291 void _and(Variable *Dest, Variable *Src0, Operand *Src1,
293 CondARM32::Cond Pred = CondARM32::AL) { 292 CondARM32::Cond Pred = CondARM32::AL) {
294 Context.insert(InstARM32And::create(Func, Dest, Src0, Src1, Pred)); 293 Context.insert<InstARM32And>(Dest, Src0, Src1, Pred);
295 } 294 }
296 void _asr(Variable *Dest, Variable *Src0, Operand *Src1, 295 void _asr(Variable *Dest, Variable *Src0, Operand *Src1,
297 CondARM32::Cond Pred = CondARM32::AL) { 296 CondARM32::Cond Pred = CondARM32::AL) {
298 Context.insert(InstARM32Asr::create(Func, Dest, Src0, Src1, Pred)); 297 Context.insert<InstARM32Asr>(Dest, Src0, Src1, Pred);
299 } 298 }
300 void _bic(Variable *Dest, Variable *Src0, Operand *Src1, 299 void _bic(Variable *Dest, Variable *Src0, Operand *Src1,
301 CondARM32::Cond Pred = CondARM32::AL) { 300 CondARM32::Cond Pred = CondARM32::AL) {
302 Context.insert(InstARM32Bic::create(Func, Dest, Src0, Src1, Pred)); 301 Context.insert<InstARM32Bic>(Dest, Src0, Src1, Pred);
303 } 302 }
304 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, 303 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse,
305 CondARM32::Cond Condition) { 304 CondARM32::Cond Condition) {
306 Context.insert( 305 Context.insert<InstARM32Br>(TargetTrue, TargetFalse, Condition);
307 InstARM32Br::create(Func, TargetTrue, TargetFalse, Condition));
308 } 306 }
309 void _br(CfgNode *Target) { 307 void _br(CfgNode *Target) { Context.insert<InstARM32Br>(Target); }
310 Context.insert(InstARM32Br::create(Func, Target));
311 }
312 void _br(CfgNode *Target, CondARM32::Cond Condition) { 308 void _br(CfgNode *Target, CondARM32::Cond Condition) {
313 Context.insert(InstARM32Br::create(Func, Target, Condition)); 309 Context.insert<InstARM32Br>(Target, Condition);
314 } 310 }
315 void _br(InstARM32Label *Label, CondARM32::Cond Condition) { 311 void _br(InstARM32Label *Label, CondARM32::Cond Condition) {
316 Context.insert(InstARM32Br::create(Func, Label, Condition)); 312 Context.insert<InstARM32Br>(Label, Condition);
317 } 313 }
318 void _cmn(Variable *Src0, Operand *Src1, 314 void _cmn(Variable *Src0, Operand *Src1,
319 CondARM32::Cond Pred = CondARM32::AL) { 315 CondARM32::Cond Pred = CondARM32::AL) {
320 Context.insert(InstARM32Cmn::create(Func, Src0, Src1, Pred)); 316 Context.insert<InstARM32Cmn>(Src0, Src1, Pred);
321 } 317 }
322 void _cmp(Variable *Src0, Operand *Src1, 318 void _cmp(Variable *Src0, Operand *Src1,
323 CondARM32::Cond Pred = CondARM32::AL) { 319 CondARM32::Cond Pred = CondARM32::AL) {
324 Context.insert(InstARM32Cmp::create(Func, Src0, Src1, Pred)); 320 Context.insert<InstARM32Cmp>(Src0, Src1, Pred);
325 } 321 }
326 void _clz(Variable *Dest, Variable *Src0, 322 void _clz(Variable *Dest, Variable *Src0,
327 CondARM32::Cond Pred = CondARM32::AL) { 323 CondARM32::Cond Pred = CondARM32::AL) {
328 Context.insert(InstARM32Clz::create(Func, Dest, Src0, Pred)); 324 Context.insert<InstARM32Clz>(Dest, Src0, Pred);
329 } 325 }
330 void _dmb() { Context.insert(InstARM32Dmb::create(Func)); } 326 void _dmb() { Context.insert<InstARM32Dmb>(); }
331 void _eor(Variable *Dest, Variable *Src0, Operand *Src1, 327 void _eor(Variable *Dest, Variable *Src0, Operand *Src1,
332 CondARM32::Cond Pred = CondARM32::AL) { 328 CondARM32::Cond Pred = CondARM32::AL) {
333 Context.insert(InstARM32Eor::create(Func, Dest, Src0, Src1, Pred)); 329 Context.insert<InstARM32Eor>(Dest, Src0, Src1, Pred);
334 } 330 }
335 /// _ldr, for all your memory to Variable data moves. It handles all types 331 /// _ldr, for all your memory to Variable data moves. It handles all types
336 /// (integer, floating point, and vectors.) Addr needs to be valid for Dest's 332 /// (integer, floating point, and vectors.) Addr needs to be valid for Dest's
337 /// type (e.g., no immediates for vector loads, and no index registers for fp 333 /// type (e.g., no immediates for vector loads, and no index registers for fp
338 /// loads.) 334 /// loads.)
339 void _ldr(Variable *Dest, OperandARM32Mem *Addr, 335 void _ldr(Variable *Dest, OperandARM32Mem *Addr,
340 CondARM32::Cond Pred = CondARM32::AL) { 336 CondARM32::Cond Pred = CondARM32::AL) {
341 Context.insert(InstARM32Ldr::create(Func, Dest, Addr, Pred)); 337 Context.insert<InstARM32Ldr>(Dest, Addr, Pred);
342 } 338 }
343 void _ldrex(Variable *Dest, OperandARM32Mem *Addr, 339 void _ldrex(Variable *Dest, OperandARM32Mem *Addr,
344 CondARM32::Cond Pred = CondARM32::AL) { 340 CondARM32::Cond Pred = CondARM32::AL) {
345 Context.insert(InstARM32Ldrex::create(Func, Dest, Addr, Pred)); 341 Context.insert<InstARM32Ldrex>(Dest, Addr, Pred);
346 if (auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest)) { 342 if (auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest)) {
347 Context.insert(InstFakeDef::create(Func, Dest64->getLo(), Dest)); 343 Context.insert<InstFakeDef>(Dest64->getLo(), Dest);
348 Context.insert(InstFakeDef::create(Func, Dest64->getHi(), Dest)); 344 Context.insert<InstFakeDef>(Dest64->getHi(), Dest);
349 } 345 }
350 } 346 }
351 void _lsl(Variable *Dest, Variable *Src0, Operand *Src1, 347 void _lsl(Variable *Dest, Variable *Src0, Operand *Src1,
352 CondARM32::Cond Pred = CondARM32::AL) { 348 CondARM32::Cond Pred = CondARM32::AL) {
353 Context.insert(InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred)); 349 Context.insert<InstARM32Lsl>(Dest, Src0, Src1, Pred);
354 } 350 }
355 void _lsls(Variable *Dest, Variable *Src0, Operand *Src1, 351 void _lsls(Variable *Dest, Variable *Src0, Operand *Src1,
356 CondARM32::Cond Pred = CondARM32::AL) { 352 CondARM32::Cond Pred = CondARM32::AL) {
357 constexpr bool SetFlags = true; 353 constexpr bool SetFlags = true;
358 Context.insert( 354 Context.insert<InstARM32Lsl>(Dest, Src0, Src1, Pred, SetFlags);
359 InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred, SetFlags));
360 } 355 }
361 void _lsr(Variable *Dest, Variable *Src0, Operand *Src1, 356 void _lsr(Variable *Dest, Variable *Src0, Operand *Src1,
362 CondARM32::Cond Pred = CondARM32::AL) { 357 CondARM32::Cond Pred = CondARM32::AL) {
363 Context.insert(InstARM32Lsr::create(Func, Dest, Src0, Src1, Pred)); 358 Context.insert<InstARM32Lsr>(Dest, Src0, Src1, Pred);
364 } 359 }
365 void _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc, 360 void _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc,
366 CondARM32::Cond Pred = CondARM32::AL) { 361 CondARM32::Cond Pred = CondARM32::AL) {
367 Context.insert(InstARM32Mla::create(Func, Dest, Src0, Src1, Acc, Pred)); 362 Context.insert<InstARM32Mla>(Dest, Src0, Src1, Acc, Pred);
368 } 363 }
369 void _mls(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc, 364 void _mls(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc,
370 CondARM32::Cond Pred = CondARM32::AL) { 365 CondARM32::Cond Pred = CondARM32::AL) {
371 Context.insert(InstARM32Mls::create(Func, Dest, Src0, Src1, Acc, Pred)); 366 Context.insert<InstARM32Mls>(Dest, Src0, Src1, Acc, Pred);
372 } 367 }
373 /// _mov, for all your Variable to Variable data movement needs. It handles 368 /// _mov, for all your Variable to Variable data movement needs. It handles
374 /// all types (integer, floating point, and vectors), as well as moves between 369 /// all types (integer, floating point, and vectors), as well as moves between
375 /// Core and VFP registers. This is not a panacea: you must obey the (weird, 370 /// Core and VFP registers. This is not a panacea: you must obey the (weird,
376 /// confusing, non-uniform) rules for data moves in ARM. 371 /// confusing, non-uniform) rules for data moves in ARM.
377 void _mov(Variable *Dest, Operand *Src0, 372 void _mov(Variable *Dest, Operand *Src0,
378 CondARM32::Cond Pred = CondARM32::AL) { 373 CondARM32::Cond Pred = CondARM32::AL) {
379 // _mov used to be unique in the sense that it would create a temporary 374 // _mov used to be unique in the sense that it would create a temporary
380 // automagically if Dest was nullptr. It won't do that anymore, so we keep 375 // automagically if Dest was nullptr. It won't do that anymore, so we keep
381 // an assert around just in case there is some untested code path where Dest 376 // an assert around just in case there is some untested code path where Dest
382 // is nullptr. 377 // is nullptr.
383 assert(Dest != nullptr); 378 assert(Dest != nullptr);
384 assert(!llvm::isa<OperandARM32Mem>(Src0)); 379 assert(!llvm::isa<OperandARM32Mem>(Src0));
385 auto *Instr = InstARM32Mov::create(Func, Dest, Src0, Pred); 380 auto *Instr = Context.insert<InstARM32Mov>(Dest, Src0, Pred);
386 381
387 Context.insert(Instr);
388 if (Instr->isMultiDest()) { 382 if (Instr->isMultiDest()) {
389 // If Instr is multi-dest, then Dest must be a Variable64On32. We add a 383 // If Instr is multi-dest, then Dest must be a Variable64On32. We add a
390 // fake-def for Instr.DestHi here. 384 // fake-def for Instr.DestHi here.
391 assert(llvm::isa<Variable64On32>(Dest)); 385 assert(llvm::isa<Variable64On32>(Dest));
392 Context.insert(InstFakeDef::create(Func, Instr->getDestHi())); 386 Context.insert<InstFakeDef>(Instr->getDestHi());
393 } 387 }
394 } 388 }
395 389
396 void _mov_redefined(Variable *Dest, Operand *Src0, 390 void _mov_redefined(Variable *Dest, Operand *Src0,
397 CondARM32::Cond Pred = CondARM32::AL) { 391 CondARM32::Cond Pred = CondARM32::AL) {
398 auto *Instr = InstARM32Mov::create(Func, Dest, Src0, Pred); 392 auto *Instr = Context.insert<InstARM32Mov>(Dest, Src0, Pred);
399 Instr->setDestRedefined(); 393 Instr->setDestRedefined();
400 Context.insert(Instr);
401 if (Instr->isMultiDest()) { 394 if (Instr->isMultiDest()) {
402 // If Instr is multi-dest, then Dest must be a Variable64On32. We add a 395 // If Instr is multi-dest, then Dest must be a Variable64On32. We add a
403 // fake-def for Instr.DestHi here. 396 // fake-def for Instr.DestHi here.
404 assert(llvm::isa<Variable64On32>(Dest)); 397 assert(llvm::isa<Variable64On32>(Dest));
405 Context.insert(InstFakeDef::create(Func, Instr->getDestHi())); 398 Context.insert<InstFakeDef>(Instr->getDestHi());
406 } 399 }
407 } 400 }
408 401
409 // -------------------------------------------------------------------------- 402 // --------------------------------------------------------------------------
410 // Begin bool folding machinery. 403 // Begin bool folding machinery.
411 // 404 //
412 // There are three types of boolean lowerings handled by this target: 405 // There are three types of boolean lowerings handled by this target:
413 // 406 //
414 // 1) Boolean expressions leading to a boolean Variable definition 407 // 1) Boolean expressions leading to a boolean Variable definition
415 // --------------------------------------------------------------- 408 // ---------------------------------------------------------------
(...skipping 214 matching lines...) Expand 10 before | Expand all | Expand 10 after
630 _br(Target, Cond.WhenTrue0); 623 _br(Target, Cond.WhenTrue0);
631 } 624 }
632 } 625 }
633 // End of bool folding machinery 626 // End of bool folding machinery
634 // -------------------------------------------------------------------------- 627 // --------------------------------------------------------------------------
635 628
636 /// The Operand can only be a 16-bit immediate or a ConstantRelocatable (with 629 /// The Operand can only be a 16-bit immediate or a ConstantRelocatable (with
637 /// an upper16 relocation). 630 /// an upper16 relocation).
638 void _movt(Variable *Dest, Operand *Src0, 631 void _movt(Variable *Dest, Operand *Src0,
639 CondARM32::Cond Pred = CondARM32::AL) { 632 CondARM32::Cond Pred = CondARM32::AL) {
640 Context.insert(InstARM32Movt::create(Func, Dest, Src0, Pred)); 633 Context.insert<InstARM32Movt>(Dest, Src0, Pred);
641 } 634 }
642 void _movw(Variable *Dest, Operand *Src0, 635 void _movw(Variable *Dest, Operand *Src0,
643 CondARM32::Cond Pred = CondARM32::AL) { 636 CondARM32::Cond Pred = CondARM32::AL) {
644 Context.insert(InstARM32Movw::create(Func, Dest, Src0, Pred)); 637 Context.insert<InstARM32Movw>(Dest, Src0, Pred);
645 } 638 }
646 void _mul(Variable *Dest, Variable *Src0, Variable *Src1, 639 void _mul(Variable *Dest, Variable *Src0, Variable *Src1,
647 CondARM32::Cond Pred = CondARM32::AL) { 640 CondARM32::Cond Pred = CondARM32::AL) {
648 Context.insert(InstARM32Mul::create(Func, Dest, Src0, Src1, Pred)); 641 Context.insert<InstARM32Mul>(Dest, Src0, Src1, Pred);
649 } 642 }
650 void _mvn(Variable *Dest, Operand *Src0, 643 void _mvn(Variable *Dest, Operand *Src0,
651 CondARM32::Cond Pred = CondARM32::AL) { 644 CondARM32::Cond Pred = CondARM32::AL) {
652 Context.insert(InstARM32Mvn::create(Func, Dest, Src0, Pred)); 645 Context.insert<InstARM32Mvn>(Dest, Src0, Pred);
653 } 646 }
654 void _orr(Variable *Dest, Variable *Src0, Operand *Src1, 647 void _orr(Variable *Dest, Variable *Src0, Operand *Src1,
655 CondARM32::Cond Pred = CondARM32::AL) { 648 CondARM32::Cond Pred = CondARM32::AL) {
656 Context.insert(InstARM32Orr::create(Func, Dest, Src0, Src1, Pred)); 649 Context.insert<InstARM32Orr>(Dest, Src0, Src1, Pred);
657 } 650 }
658 void _orrs(Variable *Dest, Variable *Src0, Operand *Src1, 651 void _orrs(Variable *Dest, Variable *Src0, Operand *Src1,
659 CondARM32::Cond Pred = CondARM32::AL) { 652 CondARM32::Cond Pred = CondARM32::AL) {
660 constexpr bool SetFlags = true; 653 constexpr bool SetFlags = true;
661 Context.insert( 654 Context.insert<InstARM32Orr>(Dest, Src0, Src1, Pred, SetFlags);
662 InstARM32Orr::create(Func, Dest, Src0, Src1, Pred, SetFlags));
663 } 655 }
664 void _push(const VarList &Sources) { 656 void _push(const VarList &Sources) { Context.insert<InstARM32Push>(Sources); }
665 Context.insert(InstARM32Push::create(Func, Sources));
666 }
667 void _pop(const VarList &Dests) { 657 void _pop(const VarList &Dests) {
668 Context.insert(InstARM32Pop::create(Func, Dests)); 658 Context.insert<InstARM32Pop>(Dests);
669 // Mark dests as modified. 659 // Mark dests as modified.
670 for (Variable *Dest : Dests) 660 for (Variable *Dest : Dests)
671 Context.insert(InstFakeDef::create(Func, Dest)); 661 Context.insert<InstFakeDef>(Dest);
672 } 662 }
673 void _rbit(Variable *Dest, Variable *Src0, 663 void _rbit(Variable *Dest, Variable *Src0,
674 CondARM32::Cond Pred = CondARM32::AL) { 664 CondARM32::Cond Pred = CondARM32::AL) {
675 Context.insert(InstARM32Rbit::create(Func, Dest, Src0, Pred)); 665 Context.insert<InstARM32Rbit>(Dest, Src0, Pred);
676 } 666 }
677 void _rev(Variable *Dest, Variable *Src0, 667 void _rev(Variable *Dest, Variable *Src0,
678 CondARM32::Cond Pred = CondARM32::AL) { 668 CondARM32::Cond Pred = CondARM32::AL) {
679 Context.insert(InstARM32Rev::create(Func, Dest, Src0, Pred)); 669 Context.insert<InstARM32Rev>(Dest, Src0, Pred);
680 } 670 }
681 void _ret(Variable *LR, Variable *Src0 = nullptr) { 671 void _ret(Variable *LR, Variable *Src0 = nullptr) {
682 Context.insert(InstARM32Ret::create(Func, LR, Src0)); 672 Context.insert<InstARM32Ret>(LR, Src0);
683 } 673 }
684 void _rscs(Variable *Dest, Variable *Src0, Operand *Src1, 674 void _rscs(Variable *Dest, Variable *Src0, Operand *Src1,
685 CondARM32::Cond Pred = CondARM32::AL) { 675 CondARM32::Cond Pred = CondARM32::AL) {
686 constexpr bool SetFlags = true; 676 constexpr bool SetFlags = true;
687 Context.insert( 677 Context.insert<InstARM32Rsc>(Dest, Src0, Src1, Pred, SetFlags);
688 InstARM32Rsc::create(Func, Dest, Src0, Src1, Pred, SetFlags));
689 } 678 }
690 void _rsc(Variable *Dest, Variable *Src0, Operand *Src1, 679 void _rsc(Variable *Dest, Variable *Src0, Operand *Src1,
691 CondARM32::Cond Pred = CondARM32::AL) { 680 CondARM32::Cond Pred = CondARM32::AL) {
692 Context.insert(InstARM32Rsc::create(Func, Dest, Src0, Src1, Pred)); 681 Context.insert<InstARM32Rsc>(Dest, Src0, Src1, Pred);
693 } 682 }
694 void _rsbs(Variable *Dest, Variable *Src0, Operand *Src1, 683 void _rsbs(Variable *Dest, Variable *Src0, Operand *Src1,
695 CondARM32::Cond Pred = CondARM32::AL) { 684 CondARM32::Cond Pred = CondARM32::AL) {
696 constexpr bool SetFlags = true; 685 constexpr bool SetFlags = true;
697 Context.insert( 686 Context.insert<InstARM32Rsb>(Dest, Src0, Src1, Pred, SetFlags);
698 InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred, SetFlags));
699 } 687 }
700 void _rsb(Variable *Dest, Variable *Src0, Operand *Src1, 688 void _rsb(Variable *Dest, Variable *Src0, Operand *Src1,
701 CondARM32::Cond Pred = CondARM32::AL) { 689 CondARM32::Cond Pred = CondARM32::AL) {
702 Context.insert(InstARM32Rsb::create(Func, Dest, Src0, Src1, Pred)); 690 Context.insert<InstARM32Rsb>(Dest, Src0, Src1, Pred);
703 } 691 }
704 void _sbc(Variable *Dest, Variable *Src0, Operand *Src1, 692 void _sbc(Variable *Dest, Variable *Src0, Operand *Src1,
705 CondARM32::Cond Pred = CondARM32::AL) { 693 CondARM32::Cond Pred = CondARM32::AL) {
706 Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred)); 694 Context.insert<InstARM32Sbc>(Dest, Src0, Src1, Pred);
707 } 695 }
708 void _sbcs(Variable *Dest, Variable *Src0, Operand *Src1, 696 void _sbcs(Variable *Dest, Variable *Src0, Operand *Src1,
709 CondARM32::Cond Pred = CondARM32::AL) { 697 CondARM32::Cond Pred = CondARM32::AL) {
710 constexpr bool SetFlags = true; 698 constexpr bool SetFlags = true;
711 Context.insert( 699 Context.insert<InstARM32Sbc>(Dest, Src0, Src1, Pred, SetFlags);
712 InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred, SetFlags));
713 } 700 }
714 void _sdiv(Variable *Dest, Variable *Src0, Variable *Src1, 701 void _sdiv(Variable *Dest, Variable *Src0, Variable *Src1,
715 CondARM32::Cond Pred = CondARM32::AL) { 702 CondARM32::Cond Pred = CondARM32::AL) {
716 Context.insert(InstARM32Sdiv::create(Func, Dest, Src0, Src1, Pred)); 703 Context.insert<InstARM32Sdiv>(Dest, Src0, Src1, Pred);
717 } 704 }
718 /// _str, for all your Variable to memory transfers. Addr has the same 705 /// _str, for all your Variable to memory transfers. Addr has the same
719 /// restrictions that it does in _ldr. 706 /// restrictions that it does in _ldr.
720 void _str(Variable *Value, OperandARM32Mem *Addr, 707 void _str(Variable *Value, OperandARM32Mem *Addr,
721 CondARM32::Cond Pred = CondARM32::AL) { 708 CondARM32::Cond Pred = CondARM32::AL) {
722 Context.insert(InstARM32Str::create(Func, Value, Addr, Pred)); 709 Context.insert<InstARM32Str>(Value, Addr, Pred);
723 } 710 }
724 void _strex(Variable *Dest, Variable *Value, OperandARM32Mem *Addr, 711 void _strex(Variable *Dest, Variable *Value, OperandARM32Mem *Addr,
725 CondARM32::Cond Pred = CondARM32::AL) { 712 CondARM32::Cond Pred = CondARM32::AL) {
726 // strex requires Dest to be a register other than Value or Addr. This 713 // strex requires Dest to be a register other than Value or Addr. This
727 // restriction is cleanly represented by adding an "early" definition of 714 // restriction is cleanly represented by adding an "early" definition of
728 // Dest (or a latter use of all the sources.) 715 // Dest (or a latter use of all the sources.)
729 Context.insert(InstFakeDef::create(Func, Dest)); 716 Context.insert<InstFakeDef>(Dest);
730 if (auto *Value64 = llvm::dyn_cast<Variable64On32>(Value)) { 717 if (auto *Value64 = llvm::dyn_cast<Variable64On32>(Value)) {
731 Context.insert(InstFakeUse::create(Func, Value64->getLo())); 718 Context.insert<InstFakeUse>(Value64->getLo());
732 Context.insert(InstFakeUse::create(Func, Value64->getHi())); 719 Context.insert<InstFakeUse>(Value64->getHi());
733 } 720 }
734 auto *Instr = InstARM32Strex::create(Func, Dest, Value, Addr, Pred); 721 auto *Instr = Context.insert<InstARM32Strex>(Dest, Value, Addr, Pred);
735 Context.insert(Instr);
736 Instr->setDestRedefined(); 722 Instr->setDestRedefined();
737 } 723 }
738 void _sub(Variable *Dest, Variable *Src0, Operand *Src1, 724 void _sub(Variable *Dest, Variable *Src0, Operand *Src1,
739 CondARM32::Cond Pred = CondARM32::AL) { 725 CondARM32::Cond Pred = CondARM32::AL) {
740 Context.insert(InstARM32Sub::create(Func, Dest, Src0, Src1, Pred)); 726 Context.insert<InstARM32Sub>(Dest, Src0, Src1, Pred);
741 } 727 }
742 void _subs(Variable *Dest, Variable *Src0, Operand *Src1, 728 void _subs(Variable *Dest, Variable *Src0, Operand *Src1,
743 CondARM32::Cond Pred = CondARM32::AL) { 729 CondARM32::Cond Pred = CondARM32::AL) {
744 constexpr bool SetFlags = true; 730 constexpr bool SetFlags = true;
745 Context.insert( 731 Context.insert<InstARM32Sub>(Dest, Src0, Src1, Pred, SetFlags);
746 InstARM32Sub::create(Func, Dest, Src0, Src1, Pred, SetFlags));
747 } 732 }
748 void _sxt(Variable *Dest, Variable *Src0, 733 void _sxt(Variable *Dest, Variable *Src0,
749 CondARM32::Cond Pred = CondARM32::AL) { 734 CondARM32::Cond Pred = CondARM32::AL) {
750 Context.insert(InstARM32Sxt::create(Func, Dest, Src0, Pred)); 735 Context.insert<InstARM32Sxt>(Dest, Src0, Pred);
751 } 736 }
752 void _tst(Variable *Src0, Operand *Src1, 737 void _tst(Variable *Src0, Operand *Src1,
753 CondARM32::Cond Pred = CondARM32::AL) { 738 CondARM32::Cond Pred = CondARM32::AL) {
754 Context.insert(InstARM32Tst::create(Func, Src0, Src1, Pred)); 739 Context.insert<InstARM32Tst>(Src0, Src1, Pred);
755 } 740 }
756 void _trap() { Context.insert(InstARM32Trap::create(Func)); } 741 void _trap() { Context.insert<InstARM32Trap>(); }
757 void _udiv(Variable *Dest, Variable *Src0, Variable *Src1, 742 void _udiv(Variable *Dest, Variable *Src0, Variable *Src1,
758 CondARM32::Cond Pred = CondARM32::AL) { 743 CondARM32::Cond Pred = CondARM32::AL) {
759 Context.insert(InstARM32Udiv::create(Func, Dest, Src0, Src1, Pred)); 744 Context.insert<InstARM32Udiv>(Dest, Src0, Src1, Pred);
760 } 745 }
761 void _umull(Variable *DestLo, Variable *DestHi, Variable *Src0, 746 void _umull(Variable *DestLo, Variable *DestHi, Variable *Src0,
762 Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) { 747 Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) {
763 Context.insert( 748 Context.insert<InstARM32Umull>(DestLo, DestHi, Src0, Src1, Pred);
764 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred));
765 // Model the modification to the second dest as a fake def. Note that the 749 // Model the modification to the second dest as a fake def. Note that the
766 // def is not predicated. 750 // def is not predicated.
767 Context.insert(InstFakeDef::create(Func, DestHi, DestLo)); 751 Context.insert<InstFakeDef>(DestHi, DestLo);
768 } 752 }
769 void _uxt(Variable *Dest, Variable *Src0, 753 void _uxt(Variable *Dest, Variable *Src0,
770 CondARM32::Cond Pred = CondARM32::AL) { 754 CondARM32::Cond Pred = CondARM32::AL) {
771 Context.insert(InstARM32Uxt::create(Func, Dest, Src0, Pred)); 755 Context.insert<InstARM32Uxt>(Dest, Src0, Pred);
772 } 756 }
773 void _vabs(Variable *Dest, Variable *Src, 757 void _vabs(Variable *Dest, Variable *Src,
774 CondARM32::Cond Pred = CondARM32::AL) { 758 CondARM32::Cond Pred = CondARM32::AL) {
775 Context.insert(InstARM32Vabs::create(Func, Dest, Src, Pred)); 759 Context.insert<InstARM32Vabs>(Dest, Src, Pred);
776 } 760 }
777 void _vadd(Variable *Dest, Variable *Src0, Variable *Src1) { 761 void _vadd(Variable *Dest, Variable *Src0, Variable *Src1) {
778 Context.insert(InstARM32Vadd::create(Func, Dest, Src0, Src1)); 762 Context.insert<InstARM32Vadd>(Dest, Src0, Src1);
779 } 763 }
780 void _vcvt(Variable *Dest, Variable *Src, InstARM32Vcvt::VcvtVariant Variant, 764 void _vcvt(Variable *Dest, Variable *Src, InstARM32Vcvt::VcvtVariant Variant,
781 CondARM32::Cond Pred = CondARM32::AL) { 765 CondARM32::Cond Pred = CondARM32::AL) {
782 Context.insert(InstARM32Vcvt::create(Func, Dest, Src, Variant, Pred)); 766 Context.insert<InstARM32Vcvt>(Dest, Src, Variant, Pred);
783 } 767 }
784 void _vdiv(Variable *Dest, Variable *Src0, Variable *Src1) { 768 void _vdiv(Variable *Dest, Variable *Src0, Variable *Src1) {
785 Context.insert(InstARM32Vdiv::create(Func, Dest, Src0, Src1)); 769 Context.insert<InstARM32Vdiv>(Dest, Src0, Src1);
786 } 770 }
787 void _vcmp(Variable *Src0, Variable *Src1, 771 void _vcmp(Variable *Src0, Variable *Src1,
788 CondARM32::Cond Pred = CondARM32::AL) { 772 CondARM32::Cond Pred = CondARM32::AL) {
789 Context.insert(InstARM32Vcmp::create(Func, Src0, Src1, Pred)); 773 Context.insert<InstARM32Vcmp>(Src0, Src1, Pred);
790 } 774 }
791 void _vcmp(Variable *Src0, OperandARM32FlexFpZero *FpZero, 775 void _vcmp(Variable *Src0, OperandARM32FlexFpZero *FpZero,
792 CondARM32::Cond Pred = CondARM32::AL) { 776 CondARM32::Cond Pred = CondARM32::AL) {
793 Context.insert(InstARM32Vcmp::create(Func, Src0, FpZero, Pred)); 777 Context.insert<InstARM32Vcmp>(Src0, FpZero, Pred);
794 } 778 }
795 void _veor(Variable *Dest, Variable *Src0, Variable *Src1) { 779 void _veor(Variable *Dest, Variable *Src0, Variable *Src1) {
796 Context.insert(InstARM32Veor::create(Func, Dest, Src0, Src1)); 780 Context.insert<InstARM32Veor>(Dest, Src0, Src1);
797 } 781 }
798 void _vmrs(CondARM32::Cond Pred = CondARM32::AL) { 782 void _vmrs(CondARM32::Cond Pred = CondARM32::AL) {
799 Context.insert(InstARM32Vmrs::create(Func, Pred)); 783 Context.insert<InstARM32Vmrs>(Pred);
800 } 784 }
801 void _vmla(Variable *Dest, Variable *Src0, Variable *Src1) { 785 void _vmla(Variable *Dest, Variable *Src0, Variable *Src1) {
802 Context.insert(InstARM32Vmla::create(Func, Dest, Src0, Src1)); 786 Context.insert<InstARM32Vmla>(Dest, Src0, Src1);
803 } 787 }
804 void _vmls(Variable *Dest, Variable *Src0, Variable *Src1) { 788 void _vmls(Variable *Dest, Variable *Src0, Variable *Src1) {
805 Context.insert(InstARM32Vmls::create(Func, Dest, Src0, Src1)); 789 Context.insert<InstARM32Vmls>(Dest, Src0, Src1);
806 } 790 }
807 void _vmul(Variable *Dest, Variable *Src0, Variable *Src1) { 791 void _vmul(Variable *Dest, Variable *Src0, Variable *Src1) {
808 Context.insert(InstARM32Vmul::create(Func, Dest, Src0, Src1)); 792 Context.insert<InstARM32Vmul>(Dest, Src0, Src1);
809 } 793 }
810 void _vsqrt(Variable *Dest, Variable *Src, 794 void _vsqrt(Variable *Dest, Variable *Src,
811 CondARM32::Cond Pred = CondARM32::AL) { 795 CondARM32::Cond Pred = CondARM32::AL) {
812 Context.insert(InstARM32Vsqrt::create(Func, Dest, Src, Pred)); 796 Context.insert<InstARM32Vsqrt>(Dest, Src, Pred);
813 } 797 }
814 void _vsub(Variable *Dest, Variable *Src0, Variable *Src1) { 798 void _vsub(Variable *Dest, Variable *Src0, Variable *Src1) {
815 Context.insert(InstARM32Vsub::create(Func, Dest, Src0, Src1)); 799 Context.insert<InstARM32Vsub>(Dest, Src0, Src1);
816 } 800 }
817 801
818 // Iterates over the CFG and determines the maximum outgoing stack arguments 802 // Iterates over the CFG and determines the maximum outgoing stack arguments
819 // bytes. This information is later used during addProlog() to pre-allocate 803 // bytes. This information is later used during addProlog() to pre-allocate
820 // the outargs area. 804 // the outargs area.
821 // TODO(jpp): This could live in the Parser, if we provided a Target-specific 805 // TODO(jpp): This could live in the Parser, if we provided a Target-specific
822 // method that the Parser could call. 806 // method that the Parser could call.
823 void findMaxStackOutArgsSize(); 807 void findMaxStackOutArgsSize();
824 808
825 /// Returns true if the given Offset can be represented in a Load/Store Mem 809 /// Returns true if the given Offset can be represented in a Load/Store Mem
(...skipping 383 matching lines...) Expand 10 before | Expand all | Expand 10 after
1209 1193
1210 private: 1194 private:
1211 ~TargetHeaderARM32() = default; 1195 ~TargetHeaderARM32() = default;
1212 1196
1213 TargetARM32Features CPUFeatures; 1197 TargetARM32Features CPUFeatures;
1214 }; 1198 };
1215 1199
1216 } // end of namespace Ice 1200 } // end of namespace Ice
1217 1201
1218 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H 1202 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H
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