| Index: src/IceTargetLoweringMIPS32.cpp
|
| diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
|
| index d0c86a71a20320dc804674e403cae73d7c2a47d1..2295dfb19b640bcd137c38f754e8eb60e34042c1 100644
|
| --- a/src/IceTargetLoweringMIPS32.cpp
|
| +++ b/src/IceTargetLoweringMIPS32.cpp
|
| @@ -1072,8 +1072,10 @@ TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx)
|
| void TargetHeaderMIPS32::lower() {
|
| OstreamLocker L(Ctx);
|
| Ostream &Str = Ctx->getStrEmit();
|
| - Str << "\t.set\tnomicromips\n";
|
| - Str << "\t.set\tnomips16\n";
|
| + Str << "\t.set\t"
|
| + << "nomicromips\n";
|
| + Str << "\t.set\t"
|
| + << "nomips16\n";
|
| }
|
|
|
| llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
|
|
|