Subzero: Separate "\t" from "opcode" in asm emission.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 800 matching lines @@
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *DestLo = getDest();
   Variable *DestHi = getDestHi();
   auto *Src = llvm::cast<Variable>(getSrc(0));
 
   assert(DestHi->hasReg());
   assert(DestLo->hasReg());
   assert(llvm::isa<Variable>(Src) && Src->hasReg());
 
   Str << "\t"
-      << "vmov" << getPredicate() << "\t";
+         "vmov" << getPredicate() << "\t";
   DestLo->emit(Func);
   Str << ", ";
   DestHi->emit(Func);
   Str << ", ";
   Src->emit(Func);
 }
 
 void InstARM32Mov::emitSingleDestMultiSource(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   auto *SrcLo = llvm::cast<Variable>(getSrc(0));
   auto *SrcHi = llvm::cast<Variable>(getSrc(1));
 
   assert(SrcHi->hasReg());
   assert(SrcLo->hasReg());
   assert(Dest->hasReg());
   assert(getSrcSize() == 2);
 
   Str << "\t"
-      << "vmov" << getPredicate() << "\t";
+         "vmov" << getPredicate() << "\t";
   Dest->emit(Func);
   Str << ", ";
   SrcLo->emit(Func);
   Str << ", ";
   SrcHi->emit(Func);
 }
 
 namespace {
 
 bool isVariableWithoutRegister(const Operand *Op) {
@@ skipping 120 matching lines @@
   Str << " ";
 
   dumpSources(Func);
 }
 
 void InstARM32Br::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t"
-      << "b" << getPredicate() << "\t";
+         "b" << getPredicate() << "\t";
   if (Label) {
     Str << Label->getName(Func);
   } else {
     if (isUnconditionalBranch()) {
       Str << getTargetFalse()->getAsmName();
     } else {
       Str << getTargetTrue()->getAsmName();
       if (getTargetFalse()) {
         startNextInst(Func);
         Str << "\n\t"
@@ skipping 50 matching lines @@
   assert(getSrcSize() == 1);
   if (llvm::isa<ConstantInteger32>(getCallTarget())) {
     // This shouldn't happen (typically have to copy the full 32-bits to a
     // register and do an indirect jump).
     llvm::report_fatal_error("ARM32Call to ConstantInteger32");
   } else if (const auto *CallTarget =
                  llvm::dyn_cast<ConstantRelocatable>(getCallTarget())) {
     // Calls only have 24-bits, but the linker should insert veneers to extend
     // the range if needed.
     Str << "\t"
-        << "bl"
-        << "\t";
+           "bl"
+           "\t";
     CallTarget->emitWithoutPrefix(Func->getTarget());
   } else {
     Str << "\t"
-        << "blx"
-        << "\t";
+           "blx"
+           "\t";
     getCallTarget()->emit(Func);
   }
 }
 
 void InstARM32Call::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   if (llvm::isa<ConstantInteger32>(getCallTarget())) {
     // This shouldn't happen (typically have to copy the full 32-bits to a
     // register and do an indirect jump).
@@ skipping 417 matching lines @@
 
 void InstARM32Ret::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(getSrcSize() > 0);
   auto *LR = llvm::cast<Variable>(getSrc(0));
   assert(LR->hasReg());
   assert(LR->getRegNum() == RegARM32::Reg_lr);
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t"
-      << "bx"
-      << "\t";
+         "bx"
+         "\t";
   LR->emit(Func);
 }
 
 void InstARM32Ret::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->bx(RegARM32::Encoded_Reg_lr);
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
@@ skipping 107 matching lines @@
   Str << "trap";
 }
 
 void InstARM32Umull::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(getDest()->hasReg());
   Str << "\t"
-      << "umull" << getPredicate() << "\t";
+         "umull" << getPredicate() << "\t";
   getDest()->emit(Func);
   Str << ", ";
   DestHi->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
 }
 
 void InstARM32Umull::emitIAS(const Cfg *Func) const {
@@ skipping 43 matching lines @@
 }
 } // end of anonymous namespace
 
 void InstARM32Vcvt::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   assert(getDest()->hasReg());
   Str << "\t"
-      << "vcvt" << getPredicate() << vcvtVariantSuffix(Variant) << "\t";
+         "vcvt" << getPredicate() << vcvtVariantSuffix(Variant) << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstARM32Vcvt::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
@@ skipping 80 matching lines @@
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   constexpr ARM32::IValueT SyOption = 0xF; // i.e. 1111
   Asm->dmb(SyOption);
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
 void InstARM32Dmb::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
-  Func->getContext()->getStrDump() << "dmb\tsy";
+  Func->getContext()->getStrDump() << "dmb\t"
+                                   << "sy";

[Karl, 2015/12/15 17:33:10]

Slight inconsistency here? dmb is the the opcode. In other places you did not
separate tables between opcodes and arguments.

[Jim Stichnoth, 2015/12/16 14:05:12]

Done.

 }
 
 void OperandARM32Mem::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "[";
   getBase()->emit(Func);
   switch (getAddrMode()) {
   case PostIndex:
@@ skipping 231 matching lines @@
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice