tests_lit/reader_tests/nacl-atomic-intrinsics.ll - Issue 1522433004: eliminate code related to --no-ir-gen

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Side by Side Diff: tests_lit/reader_tests/nacl-atomic-intrinsics.ll

Issue 1522433004: eliminate code related to --no-ir-gen (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Changes suggested by stichnot Created 5 years ago

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1 ; Test parsing NaCl atomic instructions.	1 ; Test parsing NaCl atomic instructions.

2	2

3 ; RUN: %p2i -i %s --insts \| FileCheck %s	3 ; RUN: %p2i -i %s --insts \| FileCheck %s

4 ; RUN: %if --need=allow_disable_ir_gen --command \	4 ; RUN: %p2i -i %s --args -notranslate -timing \| \

5 ; RUN: %p2i -i %s --args -notranslate -timing -no-ir-gen \

6 ; RUN: \| %if --need=allow_disable_ir_gen --command \

7 ; RUN: FileCheck --check-prefix=NOIR %s	5 ; RUN: FileCheck --check-prefix=NOIR %s

8	6

9 declare i8 @llvm.nacl.atomic.load.i8(i8*, i32)	7 declare i8 @llvm.nacl.atomic.load.i8(i8*, i32)

10 declare i16 @llvm.nacl.atomic.load.i16(i16*, i32)	8 declare i16 @llvm.nacl.atomic.load.i16(i16*, i32)

11 declare i32 @llvm.nacl.atomic.load.i32(i32*, i32)	9 declare i32 @llvm.nacl.atomic.load.i32(i32*, i32)

12 declare i64 @llvm.nacl.atomic.load.i64(i64*, i32)	10 declare i64 @llvm.nacl.atomic.load.i64(i64*, i32)

13 declare void @llvm.nacl.atomic.store.i8(i8, i8*, i32)	11 declare void @llvm.nacl.atomic.store.i8(i8, i8*, i32)

14 declare void @llvm.nacl.atomic.store.i16(i16, i16*, i32)	12 declare void @llvm.nacl.atomic.store.i16(i16, i16*, i32)

15 declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32)	13 declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32)

16 declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32)	14 declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32)

(...skipping 619 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
636 }	634 }

637	635

638 ; CHECK-NEXT: define internal i32 @test_atomic_is_lock_free(i32 %iptr) {	636 ; CHECK-NEXT: define internal i32 @test_atomic_is_lock_free(i32 %iptr) {

639 ; CHECK-NEXT: entry:	637 ; CHECK-NEXT: entry:

640 ; CHECK-NEXT: %i = call i1 @llvm.nacl.atomic.is.lock.free(i32 4, i32 %iptr)	638 ; CHECK-NEXT: %i = call i1 @llvm.nacl.atomic.is.lock.free(i32 4, i32 %iptr)

641 ; CHECK-NEXT: %r = zext i1 %i to i32	639 ; CHECK-NEXT: %r = zext i1 %i to i32

642 ; CHECK-NEXT: ret i32 %r	640 ; CHECK-NEXT: ret i32 %r

643 ; CHECK-NEXT: }	641 ; CHECK-NEXT: }

644	642

645 ; NOIR: Total across all functions	643 ; NOIR: Total across all functions

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