Subzero: Fix mid-line comments when using -asm-verbose .

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 6310 matching lines @@
 
 template <typename T>
 void emitConstant(
     Ostream &Str, const GlobalContext *Ctx,
     const typename ConstantPoolEmitterTraits<T>::ConstantType *Const) {
   using Traits = ConstantPoolEmitterTraits<T>;
   Const->emitPoolLabel(Str, Ctx);
   Str << ":\n\t" << Traits::AsmTag << "\t0x";
   T Value = Const->getValue();
   Str.write_hex(Traits::bitcastToUint64(Value));
-  Str << "\t@" << Traits::TypeName << " " << Value << "\n";
+  Str << "\t/* " << Traits::TypeName << " " << Value << " */\n";
 }
 
 template <typename T> void emitConstantPool(GlobalContext *Ctx) {
   if (!BuildDefs::dump()) {
     return;
   }
 
   using Traits = ConstantPoolEmitterTraits<T>;
   static constexpr size_t MinimumAlignment = 4;
   SizeT Align = std::max(MinimumAlignment, typeAlignInBytes(Traits::IceType));
@@ skipping 101 matching lines @@
   // Technically R9 is used for TLS with Sandboxing, and we reserve it.
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 llvm::SmallBitVector TargetARM32::ScratchRegs;
 
 } // end of namespace Ice