Subzero: Fix mid-line comments when using -asm-verbose .

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 899 matching lines @@
 void emitRegisterUsage(Ostream &Str, const Cfg *Func, const CfgNode *Node,
                        bool IsLiveIn, CfgVector<SizeT> &LiveRegCount) {
   if (!BuildDefs::dump())
     return;
   Liveness *Liveness = Func->getLiveness();
   const LivenessBV *Live;
   const int32_t StackReg = Func->getTarget()->getStackReg();
   const int32_t FrameOrStackReg = Func->getTarget()->getFrameOrStackReg();
   if (IsLiveIn) {
     Live = &Liveness->getLiveIn(Node);
-    Str << "\t\t\t\t# LiveIn=";
+    Str << "\t\t\t\t/* LiveIn=";
   } else {
     Live = &Liveness->getLiveOut(Node);
-    Str << "\t\t\t\t# LiveOut=";
+    Str << "\t\t\t\t/* LiveOut=";
   }
   if (!Live->empty()) {
     CfgVector<Variable *> LiveRegs;
     for (SizeT i = 0; i < Live->size(); ++i) {
       if (!(*Live)[i])
         continue;
       Variable *Var = Liveness->getVariable(i, Node);
       if (!Var->hasReg())
         continue;
       const int32_t RegNum = Var->getRegNum();
@@ skipping 10 matching lines @@
                 return V1->getRegNum() < V2->getRegNum();
               });
     bool First = true;
     for (Variable *Var : LiveRegs) {
       if (!First)
         Str << ",";
       First = false;
       Var->emit(Func);
     }
   }
-  Str << "\n";
+  Str << " */\n";
 }
 
 /// Returns true if some text was emitted - in which case the caller definitely
 /// needs to emit a newline character.
 bool emitLiveRangesEnded(Ostream &Str, const Cfg *Func, const Inst *Instr,
                          CfgVector<SizeT> &LiveRegCount) {
   bool Printed = false;
   if (!BuildDefs::dump())
     return Printed;
   Variable *Dest = Instr->getDest();
   // Normally we increment the live count for the dest register. But we
   // shouldn't if the instruction's IsDestRedefined flag is set, because this
   // means that the target lowering created this instruction as a non-SSA
   // assignment; i.e., a different, previous instruction started the dest
   // variable's live range.
   if (!Instr->isDestRedefined() && Dest && Dest->hasReg())
     ++LiveRegCount[Dest->getRegNum()];
   FOREACH_VAR_IN_INST(Var, *Instr) {
     bool ShouldReport = Instr->isLastUse(Var);
     if (ShouldReport && Var->hasReg()) {
       // Don't report end of live range until the live count reaches 0.
       SizeT NewCount = --LiveRegCount[Var->getRegNum()];
       if (NewCount)
         ShouldReport = false;
     }
     if (ShouldReport) {
       if (Printed)
         Str << ",";
       else
-        Str << " \t@ END=";
+        Str << " \t/* END=";
       Var->emit(Func);
       Printed = true;
     }
   }
+  if (Printed)
+    Str << " */";
   return Printed;
 }
 
 void updateStats(Cfg *Func, const Inst *I) {
   if (!BuildDefs::dump())
     return;
   // Update emitted instruction count, plus fill/spill count for Variable
   // operands without a physical register.
   if (uint32_t Count = I->getEmitInstCount()) {
     Func->getContext()->statsUpdateEmitted(Count);
@@ skipping 23 matching lines @@
   Str << getAsmName() << ":\n";
   // LiveRegCount keeps track of the number of currently live variables that
   // each register is assigned to. Normally that would be only 0 or 1, but the
   // register allocator's AllowOverlap inference allows it to be greater than 1
   // for short periods.
   CfgVector<SizeT> LiveRegCount(Func->getTarget()->getNumRegisters());
   if (DecorateAsm) {
     constexpr bool IsLiveIn = true;
     emitRegisterUsage(Str, Func, this, IsLiveIn, LiveRegCount);
     if (getInEdges().size()) {
-      Str << "\t\t\t\t# preds=";
+      Str << "\t\t\t\t/* preds=";
       bool First = true;
       for (CfgNode *I : getInEdges()) {
         if (!First)
           Str << ",";
         First = false;
         Str << "$" << I->getName();
       }
-      Str << "\n";
+      Str << " */\n";
     }
     if (getLoopNestDepth()) {
-      Str << "\t\t\t\t# loop depth=" << getLoopNestDepth() << "\n";
+      Str << "\t\t\t\t/* loop depth=" << getLoopNestDepth() << " */\n";
     }
   }
 
   for (const Inst &I : Phis) {
     if (I.isDeleted())
       continue;
     // Emitting a Phi instruction should cause an error.
     I.emit(Func);
   }
   for (const Inst &I : Insts) {
@@ skipping 353 matching lines @@
   auto *Inst = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Inst->addArg(AtomicRMWOp);
   Inst->addArg(Counter);
   Inst->addArg(One);
   Inst->addArg(OrderAcquireRelease);
   Insts.push_front(Inst);
 }
 
 } // end of namespace Ice