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Issue 1521133002: Add CLZ instruction to the ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Remove comment in test case. Created 5 years ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
6 // Please update the (git) revision if we merge changes from Dart. 6 // Please update the (git) revision if we merge changes from Dart.
7 // https://code.google.com/p/dart/wiki/GettingTheSource 7 // https://code.google.com/p/dart/wiki/GettingTheSource
8 8
9 #include "vm/globals.h" // NOLINT 9 #include "vm/globals.h" // NOLINT
10 #if defined(TARGET_ARCH_ARM) 10 #if defined(TARGET_ARCH_ARM)
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310 310
311 // Moved to ARM32::AssemblerARM32::mvn() 311 // Moved to ARM32::AssemblerARM32::mvn()
312 void Assembler::mvn(Register rd, Operand o, Condition cond) { 312 void Assembler::mvn(Register rd, Operand o, Condition cond) {
313 EmitType01(cond, o.type(), MVN, 0, R0, rd, o); 313 EmitType01(cond, o.type(), MVN, 0, R0, rd, o);
314 } 314 }
315 315
316 // Moved to ARM32::AssemblerARM32::mvn() 316 // Moved to ARM32::AssemblerARM32::mvn()
317 void Assembler::mvns(Register rd, Operand o, Condition cond) { 317 void Assembler::mvns(Register rd, Operand o, Condition cond) {
318 EmitType01(cond, o.type(), MVN, 1, R0, rd, o); 318 EmitType01(cond, o.type(), MVN, 1, R0, rd, o);
319 } 319 }
320 #endif
321 320
321 // Moved to ARM32::AssemblerARM32::clz()
322 void Assembler::clz(Register rd, Register rm, Condition cond) { 322 void Assembler::clz(Register rd, Register rm, Condition cond) {
323 ASSERT(rd != kNoRegister); 323 ASSERT(rd != kNoRegister);
324 ASSERT(rm != kNoRegister); 324 ASSERT(rm != kNoRegister);
325 ASSERT(cond != kNoCondition); 325 ASSERT(cond != kNoCondition);
326 ASSERT(rd != PC); 326 ASSERT(rd != PC);
327 ASSERT(rm != PC); 327 ASSERT(rm != PC);
328 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 328 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
329 B24 | B22 | B21 | (0xf << 16) | 329 B24 | B22 | B21 | (0xf << 16) |
330 (static_cast<int32_t>(rd) << kRdShift) | 330 (static_cast<int32_t>(rd) << kRdShift) |
331 (0xf << 8) | B4 | static_cast<int32_t>(rm); 331 (0xf << 8) | B4 | static_cast<int32_t>(rm);
332 Emit(encoding); 332 Emit(encoding);
333 } 333 }
334 334
335
336 #if 0
337 // Moved to ARM32::AssemblerARM32::movw() 335 // Moved to ARM32::AssemblerARM32::movw()
338 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) { 336 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) {
339 ASSERT(cond != kNoCondition); 337 ASSERT(cond != kNoCondition);
340 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 338 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
341 B25 | B24 | ((imm16 >> 12) << 16) | 339 B25 | B24 | ((imm16 >> 12) << 16) |
342 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff); 340 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
343 Emit(encoding); 341 Emit(encoding);
344 } 342 }
345 343
346 344
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3687 3685
3688 3686
3689 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3687 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3690 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3688 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3691 return fpu_reg_names[reg]; 3689 return fpu_reg_names[reg];
3692 } 3690 }
3693 3691
3694 } // namespace dart 3692 } // namespace dart
3695 3693
3696 #endif // defined TARGET_ARCH_ARM 3694 #endif // defined TARGET_ARCH_ARM
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