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Unified Diff: src/compiler/mips64/instruction-codes-mips64.h

Issue 1520503002: MIPS: [turbofan] Optimize Float32 to Int32 rep. changes with Float32 round ops. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix typo. Created 5 years ago
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Index: src/compiler/mips64/instruction-codes-mips64.h
diff --git a/src/compiler/mips64/instruction-codes-mips64.h b/src/compiler/mips64/instruction-codes-mips64.h
index 9cfd286011c498ce44c7e7675a2fd82a51842197..7056b57ff2e518570f41fe280df34c145077752e 100644
--- a/src/compiler/mips64/instruction-codes-mips64.h
+++ b/src/compiler/mips64/instruction-codes-mips64.h
@@ -84,6 +84,10 @@ namespace compiler {
V(Mips64RoundWD) \
V(Mips64FloorWD) \
V(Mips64CeilWD) \
+ V(Mips64TruncWS) \
+ V(Mips64RoundWS) \
+ V(Mips64FloorWS) \
+ V(Mips64CeilWS) \
V(Mips64TruncLS) \
V(Mips64TruncLD) \
V(Mips64TruncUwD) \
@@ -91,6 +95,7 @@ namespace compiler {
V(Mips64TruncUlD) \
V(Mips64CvtDW) \
V(Mips64CvtSL) \
+ V(Mips64CvtSW) \
V(Mips64CvtSUl) \
V(Mips64CvtDL) \
V(Mips64CvtDUw) \
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