MIPS: [turbofan] Optimize Float32 to Int32 rep. changes with Float32 round ops.

src/compiler/mips/instruction-codes-mips.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 53 matching lines @@
   V(MipsFloat64RoundDown)          \
   V(MipsFloat64RoundTruncate)      \
   V(MipsFloat64RoundUp)            \
   V(MipsFloat64RoundTiesEven)      \
   V(MipsCvtSD)                     \
   V(MipsCvtDS)                     \
   V(MipsTruncWD)                   \
   V(MipsRoundWD)                   \
   V(MipsFloorWD)                   \
   V(MipsCeilWD)                    \
+  V(MipsTruncWS)                   \
+  V(MipsRoundWS)                   \
+  V(MipsFloorWS)                   \
+  V(MipsCeilWS)                    \
   V(MipsTruncUwD)                  \
   V(MipsCvtDW)                     \
   V(MipsCvtDUw)                    \
+  V(MipsCvtSW)                     \
   V(MipsLb)                        \
   V(MipsLbu)                       \
   V(MipsSb)                        \
   V(MipsLh)                        \
   V(MipsLhu)                       \
   V(MipsSh)                        \
   V(MipsLw)                        \
   V(MipsSw)                        \
   V(MipsLwc1)                      \
   V(MipsSwc1)                      \
@@ skipping 29 matching lines @@
 #define TARGET_ADDRESSING_MODE_LIST(V) \
   V(MRI) /* [%r0 + K] */               \
   V(MRR) /* [%r0 + %r1] */
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_