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Issue 1520503002: MIPS: [turbofan] Optimize Float32 to Int32 rep. changes with Float32 round ops. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase. Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file 3 // found in the LICENSE file
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 244 matching lines...)
255 255
256 // mips instructions: 256 // mips instructions:
257 // trunc double to unsigned word, for more details look at mips macro 257 // trunc double to unsigned word, for more details look at mips macro
258 // asm and mips asm file 258 // asm and mips asm file
259 {{&RawMachineAssembler::ChangeFloat64ToUint32, "ChangeFloat64ToUint32", 259 {{&RawMachineAssembler::ChangeFloat64ToUint32, "ChangeFloat64ToUint32",
260 kMips64TruncUwD, MachineType::Float64()}, 260 kMips64TruncUwD, MachineType::Float64()},
261 MachineType::Int32()}}; 261 MachineType::Int32()}};
262 262
263 const Conversion kFloat64RoundInstructions[] = { 263 const Conversion kFloat64RoundInstructions[] = {
264 {{&RawMachineAssembler::Float64RoundUp, "Float64RoundUp", kMips64CeilWD, 264 {{&RawMachineAssembler::Float64RoundUp, "Float64RoundUp", kMips64CeilWD,
265 MachineType::Float64()}, 265 MachineType::Int32()},
266 MachineType::Int32()}, 266 MachineType::Float64()},
267 {{&RawMachineAssembler::Float64RoundDown, "Float64RoundDown", 267 {{&RawMachineAssembler::Float64RoundDown, "Float64RoundDown",
268 kMips64FloorWD, MachineType::Float64()}, 268 kMips64FloorWD, MachineType::Int32()},
269 MachineType::Int32()}, 269 MachineType::Float64()},
270 {{&RawMachineAssembler::Float64RoundTiesEven, "Float64RoundTiesEven", 270 {{&RawMachineAssembler::Float64RoundTiesEven, "Float64RoundTiesEven",
271 kMips64RoundWD, MachineType::Float64()}, 271 kMips64RoundWD, MachineType::Int32()},
272 MachineType::Int32()}, 272 MachineType::Float64()},
273 {{&RawMachineAssembler::Float64RoundTruncate, "Float64RoundTruncate", 273 {{&RawMachineAssembler::Float64RoundTruncate, "Float64RoundTruncate",
274 kMips64TruncWD, MachineType::Float64()}, 274 kMips64TruncWD, MachineType::Int32()},
275 MachineType::Int32()}}; 275 MachineType::Float64()}};
276
277 const Conversion kFloat32RoundInstructions[] = {
278 {{&RawMachineAssembler::Float32RoundUp, "Float32RoundUp", kMips64CeilWS,
279 MachineType::Int32()},
280 MachineType::Float32()},
281 {{&RawMachineAssembler::Float32RoundDown, "Float32RoundDown",
282 kMips64FloorWS, MachineType::Int32()},
283 MachineType::Float32()},
284 {{&RawMachineAssembler::Float32RoundTiesEven, "Float32RoundTiesEven",
285 kMips64RoundWS, MachineType::Int32()},
286 MachineType::Float32()},
287 {{&RawMachineAssembler::Float32RoundTruncate, "Float32RoundTruncate",
288 kMips64TruncWS, MachineType::Int32()},
289 MachineType::Float32()}};
276 290
277 } // namespace 291 } // namespace
278 292
279 293
280 typedef InstructionSelectorTestWithParam<FPCmp> InstructionSelectorFPCmpTest; 294 typedef InstructionSelectorTestWithParam<FPCmp> InstructionSelectorFPCmpTest;
281 295
282 TEST_P(InstructionSelectorFPCmpTest, Parameter) { 296 TEST_P(InstructionSelectorFPCmpTest, Parameter) {
283 const FPCmp cmp = GetParam(); 297 const FPCmp cmp = GetParam();
284 StreamBuilder m(this, MachineType::Int32(), cmp.mi.machine_type, 298 StreamBuilder m(this, MachineType::Int32(), cmp.mi.machine_type,
285 cmp.mi.machine_type); 299 cmp.mi.machine_type);
(...skipping 588 matching lines...)
874 EXPECT_EQ(kMode_None, s[0]->addressing_mode()); 888 EXPECT_EQ(kMode_None, s[0]->addressing_mode());
875 ASSERT_EQ(1U, s[0]->InputCount()); 889 ASSERT_EQ(1U, s[0]->InputCount());
876 EXPECT_EQ(1U, s[0]->OutputCount()); 890 EXPECT_EQ(1U, s[0]->OutputCount());
877 } 891 }
878 } 892 }
879 893
880 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, 894 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
881 CombineChangeFloat64ToInt32WithRoundFloat64, 895 CombineChangeFloat64ToInt32WithRoundFloat64,
882 ::testing::ValuesIn(kFloat64RoundInstructions)); 896 ::testing::ValuesIn(kFloat64RoundInstructions));
883 897
898 typedef InstructionSelectorTestWithParam<Conversion>
899 CombineChangeFloat32ToInt32WithRoundFloat32;
900
901 TEST_P(CombineChangeFloat32ToInt32WithRoundFloat32, Parameter) {
902 {
903 const Conversion conv = GetParam();
904 StreamBuilder m(this, conv.mi.machine_type, conv.src_machine_type);
905 m.Return(m.ChangeFloat64ToInt32(
906 m.ChangeFloat32ToFloat64((m.*conv.mi.constructor)(m.Parameter(0)))));
907 Stream s = m.Build();
908 ASSERT_EQ(1U, s.size());
909 EXPECT_EQ(conv.mi.arch_opcode, s[0]->arch_opcode());
910 EXPECT_EQ(kMode_None, s[0]->addressing_mode());
911 ASSERT_EQ(1U, s[0]->InputCount());
912 EXPECT_EQ(1U, s[0]->OutputCount());
913 }
914 }
915
916 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
917 CombineChangeFloat32ToInt32WithRoundFloat32,
918 ::testing::ValuesIn(kFloat32RoundInstructions));
919
920
921 TEST_F(InstructionSelectorTest, ChangeFloat64ToInt32OfChangeFloat32ToFloat64) {
922 {
923 StreamBuilder m(this, MachineType::Int32(), MachineType::Float32());
924 m.Return(m.ChangeFloat64ToInt32(m.ChangeFloat32ToFloat64(m.Parameter(0))));
925 Stream s = m.Build();
926 ASSERT_EQ(1U, s.size());
927 EXPECT_EQ(kMips64TruncWS, s[0]->arch_opcode());
928 EXPECT_EQ(kMode_None, s[0]->addressing_mode());
929 ASSERT_EQ(1U, s[0]->InputCount());
930 EXPECT_EQ(1U, s[0]->OutputCount());
931 }
932 }
933
934
935 TEST_F(InstructionSelectorTest,
936 TruncateFloat64ToFloat32OfChangeInt32ToFloat64) {
937 {
938 StreamBuilder m(this, MachineType::Float32(), MachineType::Int32());
939 m.Return(
940 m.TruncateFloat64ToFloat32(m.ChangeInt32ToFloat64(m.Parameter(0))));
941 Stream s = m.Build();
942 ASSERT_EQ(1U, s.size());
943 EXPECT_EQ(kMips64CvtSW, s[0]->arch_opcode());
944 EXPECT_EQ(kMode_None, s[0]->addressing_mode());
945 ASSERT_EQ(1U, s[0]->InputCount());
946 EXPECT_EQ(1U, s[0]->OutputCount());
947 }
948 }
949
884 950
885 TEST_F(InstructionSelectorTest, CombineShiftsWithMul) { 951 TEST_F(InstructionSelectorTest, CombineShiftsWithMul) {
886 { 952 {
887 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32()); 953 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
888 m.Return(m.Int32Mul(m.Word64Sar(m.Parameter(0), m.Int32Constant(32)), 954 m.Return(m.Int32Mul(m.Word64Sar(m.Parameter(0), m.Int32Constant(32)),
889 m.Word64Sar(m.Parameter(0), m.Int32Constant(32)))); 955 m.Word64Sar(m.Parameter(0), m.Int32Constant(32))));
890 Stream s = m.Build(); 956 Stream s = m.Build();
891 ASSERT_EQ(1U, s.size()); 957 ASSERT_EQ(1U, s.size());
892 EXPECT_EQ(kMips64DMulHigh, s[0]->arch_opcode()); 958 EXPECT_EQ(kMips64DMulHigh, s[0]->arch_opcode());
893 EXPECT_EQ(kMode_None, s[0]->addressing_mode()); 959 EXPECT_EQ(kMode_None, s[0]->addressing_mode());
(...skipping 514 matching lines...)
1408 ASSERT_EQ(1U, s.size()); 1474 ASSERT_EQ(1U, s.size());
1409 EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode()); 1475 EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode());
1410 ASSERT_EQ(2U, s[0]->InputCount()); 1476 ASSERT_EQ(2U, s[0]->InputCount());
1411 ASSERT_EQ(1U, s[0]->OutputCount()); 1477 ASSERT_EQ(1U, s[0]->OutputCount());
1412 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 1478 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
1413 } 1479 }
1414 1480
1415 } // namespace compiler 1481 } // namespace compiler
1416 } // namespace internal 1482 } // namespace internal
1417 } // namespace v8 1483 } // namespace v8
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