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1 //===- subzero/src/IceAssemblerARM32.cpp - Assembler for ARM32 --*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.cpp - Assembler for ARM32 --*- C++ -*-===// |
2 // | 2 // |
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
6 // | 6 // |
7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
8 // | 8 // |
9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
10 // | 10 // |
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1866 // sub{s}<c> sp, <Rn>, #<RotatedImm8> | 1866 // sub{s}<c> sp, <Rn>, #<RotatedImm8> |
1867 // | 1867 // |
1868 // cccc0010010snnnnddddiiiiiiiiiiii where cccc=Cond, dddd=Rd, nnnn=Rn, | 1868 // cccc0010010snnnnddddiiiiiiiiiiii where cccc=Cond, dddd=Rd, nnnn=Rn, |
1869 // s=SetFlags and iiiiiiiiiiii=Src1Value defining RotatedImm8 | 1869 // s=SetFlags and iiiiiiiiiiii=Src1Value defining RotatedImm8 |
1870 constexpr const char *SubName = "sub"; | 1870 constexpr const char *SubName = "sub"; |
1871 constexpr IValueT SubOpcode = B1; // 0010 | 1871 constexpr IValueT SubOpcode = B1; // 0010 |
1872 emitType01(Cond, SubOpcode, OpRd, OpRn, OpSrc1, SetFlags, RdIsPcAndSetFlags, | 1872 emitType01(Cond, SubOpcode, OpRd, OpRn, OpSrc1, SetFlags, RdIsPcAndSetFlags, |
1873 SubName); | 1873 SubName); |
1874 } | 1874 } |
1875 | 1875 |
1876 // Use a particular UDF encoding -- TRAPNaCl in LLVM: 0xE7FEDEF0 | |
1877 // http://llvm.org/viewvc/llvm-project?view=revision&revision=173943 | |
1878 const uint8_t AssemblerARM32::TrapInst[] = {0xE7, 0xFE, 0xDE, 0xF0}; | |
1879 | |
1880 llvm::ArrayRef<uint8_t> AssemblerARM32::getNonExecBundlePadding() const { | |
1881 return llvm::ArrayRef<uint8_t>(TrapInst, llvm::array_lengthof(TrapInst)); | |
1882 } | |
1883 | |
1884 void AssemblerARM32::trap() { | |
1885 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | |
1886 for (size_t i = llvm::array_lengthof(TrapInst); i > 0; --i) { | |
Jim Stichnoth
2015/12/17 16:41:00
Actually, one more (optional) idea that adds a lot
Karl
2015/12/17 16:55:28
Done.
| |
1887 Buffer.emit<uint8_t>(TrapInst[i - 1]); | |
1888 } | |
1889 } | |
1890 | |
1876 void AssemblerARM32::tst(const Operand *OpRn, const Operand *OpSrc1, | 1891 void AssemblerARM32::tst(const Operand *OpRn, const Operand *OpSrc1, |
1877 CondARM32::Cond Cond) { | 1892 CondARM32::Cond Cond) { |
1878 // TST (register) - ARM section A8.8.241, encoding A1: | 1893 // TST (register) - ARM section A8.8.241, encoding A1: |
1879 // tst<c> <Rn>, <Rm>(, <shift>} | 1894 // tst<c> <Rn>, <Rm>(, <shift>} |
1880 // | 1895 // |
1881 // cccc00010001nnnn0000iiiiitt0mmmm where cccc=Cond, nnnn=Rn, mmmm=Rm, | 1896 // cccc00010001nnnn0000iiiiitt0mmmm where cccc=Cond, nnnn=Rn, mmmm=Rm, |
1882 // iiiii=Shift, and tt=ShiftKind. | 1897 // iiiii=Shift, and tt=ShiftKind. |
1883 // | 1898 // |
1884 // TST (immediate) - ARM section A8.8.240, encoding A1: | 1899 // TST (immediate) - ARM section A8.8.240, encoding A1: |
1885 // tst<c> <Rn>, #<RotatedImm8> | 1900 // tst<c> <Rn>, #<RotatedImm8> |
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1935 | 1950 |
1936 void AssemblerARM32::uxt(const Operand *OpRd, const Operand *OpSrc0, | 1951 void AssemblerARM32::uxt(const Operand *OpRd, const Operand *OpSrc0, |
1937 CondARM32::Cond Cond) { | 1952 CondARM32::Cond Cond) { |
1938 constexpr const char *UxtName = "uxt"; | 1953 constexpr const char *UxtName = "uxt"; |
1939 constexpr IValueT UxtOpcode = B26 | B25 | B23 | B22 | B21; | 1954 constexpr IValueT UxtOpcode = B26 | B25 | B23 | B22 | B21; |
1940 emitSignExtend(Cond, UxtOpcode, OpRd, OpSrc0, UxtName); | 1955 emitSignExtend(Cond, UxtOpcode, OpRd, OpSrc0, UxtName); |
1941 } | 1956 } |
1942 | 1957 |
1943 } // end of namespace ARM32 | 1958 } // end of namespace ARM32 |
1944 } // end of namespace Ice | 1959 } // end of namespace Ice |
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