Add translation of REV in ARM integrated assembler.

tests_lit/assembler/arm32/rev.ll

Index: tests_lit/assembler/arm32/rev.ll
diff --git a/tests_lit/assembler/arm32/rsc.ll b/tests_lit/assembler/arm32/rev.ll
similarity index 52%
copy from tests_lit/assembler/arm32/rsc.ll
copy to tests_lit/assembler/arm32/rev.ll
index f79fc0425426a65c8cca3e91d30395bfb9a1feea..6634813cdbb633f0adf0e8fef7028e702ee11110 100644
--- a/tests_lit/assembler/arm32/rsc.ll
+++ b/tests_lit/assembler/arm32/rev.ll
@@ -1,4 +1,4 @@
-; Show that we know how to translate rsc
+; Show that we know how to translate rev (used in bswap).
 
 ; NOTE: We use -O2 to get rid of memory stores.
 
@@ -20,30 +20,30 @@
 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
 ; RUN:   --args -O2 | FileCheck %s --check-prefix=DIS
 
-define internal i64 @NegateI64(i64 %a) {
-; ASM-LABEL:NegateI64:
-; DIS-LABEL:00000000 <NegateI64>:
-; IASM-LABEL:NegateI64:
+declare i16 @llvm.bswap.i16(i16)
+
+define internal i32 @testRev(i32 %a) {
+; ASM-LABEL:testRev:
+; DIS-LABEL:00000000 <testRev>:
+; IASM-LABEL:testRev:
 
 entry:
-; ASM-NEXT:.LNegateI64$entry:
-; IASM-NEXT:.LNegateI64$entry:
-
-  %res = sub i64 0, %a
-
-; ASM-NEXT:     rsbs    r0, r0, #0
-; DIS-NEXT:   0:        e2700000
-; IASM-NEXT:	.byte 0x0
-; IASM-NEXT:	.byte 0x0
-; IASM-NEXT:	.byte 0x70
-; IASM-NEXT:	.byte 0xe2
-
-; ASM-NEXT:     rsc     r1, r1, #0
-; DIS-NEXT:   4:        e2e11000
-; IASM-NEXT:	.byte 0x0
-; IASM-NEXT:	.byte 0x10
-; IASM-NEXT:	.byte 0xe1
-; IASM-NEXT:	.byte 0xe2
-
-  ret i64 %res
+; ASM-NEXT:.LtestRev$entry:
+; IASM-NEXT:.LtestRev$entry:
+
+  %a.arg_trunc = trunc i32 %a to i16
+  %v = tail call i16 @llvm.bswap.i16(i16 %a.arg_trunc)
+
+; ***** Example of rev instruction. *****
+; ASM-NEXT:     rev     r0, r0
+; DIS-NEXT:   0:        e6bf0f30
+; IASM-NEXT:    .byte 0x30
+; IASM-NEXT:    .byte 0xf
+; IASM-NEXT:    .byte 0xbf
+; IASM-NEXT:    .byte 0xe6
+
+; ASM-NEXT:     lsr     r0, r0, #16
+
+  %.ret_ext = zext i16 %v to i32
+  ret i32 %.ret_ext
 }