Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(158)

Side by Side Diff: tests_lit/assembler/arm32/rev.ll

Issue 1517863002: Add translation of REV in ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nit. Created 5 years ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceInstARM32.cpp ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; Show that we know how to translate rsc 1 ; Show that we know how to translate rev (used in bswap).
2 2
3 ; NOTE: We use -O2 to get rid of memory stores. 3 ; NOTE: We use -O2 to get rid of memory stores.
4 4
5 ; REQUIRES: allow_dump 5 ; REQUIRES: allow_dump
6 6
7 ; Compile using standalone assembler. 7 ; Compile using standalone assembler.
8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
9 ; RUN: | FileCheck %s --check-prefix=ASM 9 ; RUN: | FileCheck %s --check-prefix=ASM
10 10
11 ; Show bytes in assembled standalone code. 11 ; Show bytes in assembled standalone code.
12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS 13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS
14 14
15 ; Compile using integrated assembler. 15 ; Compile using integrated assembler.
16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ 16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \
17 ; RUN: | FileCheck %s --check-prefix=IASM 17 ; RUN: | FileCheck %s --check-prefix=IASM
18 18
19 ; Show bytes in assembled integrated code. 19 ; Show bytes in assembled integrated code.
20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS 21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS
22 22
23 define internal i64 @NegateI64(i64 %a) { 23 declare i16 @llvm.bswap.i16(i16)
24 ; ASM-LABEL:NegateI64: 24
25 ; DIS-LABEL:00000000 <NegateI64>: 25 define internal i32 @testRev(i32 %a) {
26 ; IASM-LABEL:NegateI64: 26 ; ASM-LABEL:testRev:
27 ; DIS-LABEL:00000000 <testRev>:
28 ; IASM-LABEL:testRev:
27 29
28 entry: 30 entry:
29 ; ASM-NEXT:.LNegateI64$entry: 31 ; ASM-NEXT:.LtestRev$entry:
30 ; IASM-NEXT:.LNegateI64$entry: 32 ; IASM-NEXT:.LtestRev$entry:
31 33
32 %res = sub i64 0, %a 34 %a.arg_trunc = trunc i32 %a to i16
35 %v = tail call i16 @llvm.bswap.i16(i16 %a.arg_trunc)
33 36
34 ; ASM-NEXT: rsbs r0, r0, #0 37 ; ***** Example of rev instruction. *****
35 ; DIS-NEXT: 0: e2700000 38 ; ASM-NEXT: rev r0, r0
36 ; IASM-NEXT:» .byte 0x0 39 ; DIS-NEXT: 0: e6bf0f30
37 ; IASM-NEXT:» .byte 0x0 40 ; IASM-NEXT: .byte 0x30
38 ; IASM-NEXT:» .byte 0x70 41 ; IASM-NEXT: .byte 0xf
39 ; IASM-NEXT:» .byte 0xe2 42 ; IASM-NEXT: .byte 0xbf
43 ; IASM-NEXT: .byte 0xe6
40 44
41 ; ASM-NEXT: rsc r1, r1, #0 45 ; ASM-NEXT: lsr r0, r0, #16
42 ; DIS-NEXT: 4: e2e11000
43 ; IASM-NEXT:» .byte 0x0
44 ; IASM-NEXT:» .byte 0x10
45 ; IASM-NEXT:» .byte 0xe1
46 ; IASM-NEXT:» .byte 0xe2
47 46
48 ret i64 %res 47 %.ret_ext = zext i16 %v to i32
48 ret i32 %.ret_ext
49 } 49 }
OLDNEW
« no previous file with comments | « src/IceInstARM32.cpp ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698