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Issue 1517243004: MIPS: [turbofan] Fixed Div operations by zero on r6. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
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641 break; 641 break;
642 case kMipsMulHigh: 642 case kMipsMulHigh:
643 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 643 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
644 break; 644 break;
645 case kMipsMulHighU: 645 case kMipsMulHighU:
646 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 646 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
647 break; 647 break;
648 case kMipsDiv: 648 case kMipsDiv:
649 __ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 649 __ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
650 if (IsMipsArchVariant(kMips32r6)) { 650 if (IsMipsArchVariant(kMips32r6)) {
651 __ selnez(i.OutputRegister(), i.InputRegister(1), i.InputRegister(0)); 651 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
652 } else { 652 } else {
653 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); 653 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
654 } 654 }
655 break; 655 break;
656 case kMipsDivU: 656 case kMipsDivU:
657 __ Divu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 657 __ Divu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
658 if (IsMipsArchVariant(kMips32r6)) { 658 if (IsMipsArchVariant(kMips32r6)) {
659 __ selnez(i.OutputRegister(), i.InputRegister(1), i.InputRegister(0)); 659 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
660 } else { 660 } else {
661 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); 661 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
662 } 662 }
663 break; 663 break;
664 case kMipsMod: 664 case kMipsMod:
665 __ Mod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 665 __ Mod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
666 break; 666 break;
667 case kMipsModU: 667 case kMipsModU:
668 __ Modu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 668 __ Modu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
669 break; 669 break;
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1714 padding_size -= v8::internal::Assembler::kInstrSize; 1714 padding_size -= v8::internal::Assembler::kInstrSize;
1715 } 1715 }
1716 } 1716 }
1717 } 1717 }
1718 1718
1719 #undef __ 1719 #undef __
1720 1720
1721 } // namespace compiler 1721 } // namespace compiler
1722 } // namespace internal 1722 } // namespace internal
1723 } // namespace v8 1723 } // namespace v8
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